mc68hc908mr8 Freescale Semiconductor, Inc, mc68hc908mr8 Datasheet - Page 234

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mc68hc908mr8

Manufacturer Part Number
mc68hc908mr8
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Timer Interface B (TIMB)
12.4.4.3 PWM Initialization
Technical Data
234
NOTE:
NOTE:
In buffered PWM signal generation, do not write new pulse width values
to the currently active channel registers. User software should track the
currently active channel to prevent writing a new value to the active
channel. Writing to the active channel registers is the same as
generating unbuffered PWM signals.
To ensure correct operation when generating unbuffered or buffered
PWM signals, use this initialization procedure:
In PWM signal generation, do not program the PWM channel to toggle
on output compare. Toggling on output compare prevents reliable
0 percent duty cycle generation and removes the ability of the channel
to self-correct in the event of software error or noise. Toggling on output
compare can also cause incorrect PWM signal generation when
changing the PWM pulse width to a new, much larger value.
1. In the TIMB status and control register (TBSC):
2. In the TIMB counter modulo registers (TBMODH–TBMODL), write
3. In the TIMB channel x registers (TBCHxH–TBCHxL), write the
4. In TIMB channel x status and control register (TBSCx):
5. In the TIMB status control register (TBSC), clear the TIMB stop bit,
a. Stop the TIMB counter by setting the TIMB stop bit, TSTOP.
b. Reset the TIMB counter and prescaler by setting the TIMB
the value for the required PWM period.
value for the required pulse width.
a. Write 0:1 (for unbuffered output compare or PWM signals) or
b. Write 1 to the toggle-on-overflow bit, TOVx.
c. Write 1:0 (to clear output on compare) or 1:1 (to set output on
TSTOP.
reset bit, TRST.
1:0 (for buffered output compare or PWM signals) to the mode
select bits, MSxB–MSxA. See
compare) to the edge/level select bits, ELSxB–ELSxA. The
output action on compare must force the output to the
complement of the pulse width level. See
Timer Interface B (TIMB)
Table
MC68HC908MR8 — Rev 4.1
12-2.
Freescale Semiconductor
Table
12-2.

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