mc68hc908rc24d Freescale Semiconductor, Inc, mc68hc908rc24d Datasheet - Page 49

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mc68hc908rc24d

Manufacturer Part Number
mc68hc908rc24d
Description
M68hc08 Microcontrollers
Manufacturer
Freescale Semiconductor, Inc
Datasheet
4.8 Block Protection
4.9 FLASH Block Protect Register
MC68HC908RC24 — Rev. 1.1
Freescale Semiconductor
Address:
Due to the ability of the on-board charge pump to erase and program the
FLASH memory in the target application, provision is made for protecting
blocks of memory from unintentional erase or program operations due to
system malfunction. This protection is done by reserving a location in the
memory for block protect information and requiring that this location be
read from to enable setting of the HVEN bit.
When the block protect register is read, its contents are latched by the
FLASH control logic. If the address range for an erase or program
operation includes a protected block, the PGM or ERASE bit is cleared
which prevents the HVEN bit in the FLASH control register from being
set so that no high voltage is allowed in the array.
When the block protect register is erased (all 0s), the entire memory is
accessible for program and erase. When bits within the register are
programmed, they lock blocks of memory address ranges as shown in
4.9 FLASH Block Protect
the IRQ1 pin will bypass the block protection so that all of the memory,
including the block protect register, is open for program and erase
operations.
The block protect register (FLBPR) is implemented as a byte within the
FLASH memory. The erased state is logical 0. Each bit, when
programmed, protects a range of addresses in the FLASH.
Reset:
Read:
Write:
Figure 4-2. FLASH Block Protect Register (FLBPR)
$FF80
Bit 7
0
0
= Unimplemented
FLASH Memory
6
0
0
5
0
0
Register. The presence of a voltage V
4
0
0
BPR3
3
Unaffected by reset
BPR2
2
Advance Information
BPR1
Block Protection
FLASH Memory
1
TST
BPR0
Bit 0
on
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