mc68hc05pv8 Freescale Semiconductor, Inc, mc68hc05pv8 Datasheet - Page 95

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mc68hc05pv8

Manufacturer Part Number
mc68hc05pv8
Description
Hcmos Microcontroller Unit
Manufacturer
Freescale Semiconductor, Inc
Datasheet
7.4 Port A
MC68HC(8)05PV8/A — Rev. 1.9
Connections
NOTE:
NOTE:
Internal
HC05
To avoid a glitch on the output pins, write data to the I/O port data
register before writing a one to the corresponding data direction register.
If the I/O pin is an input and a read-modify-write (RMW) instruction is
executed, the I/O pin will be read into the HC05 CPU and the computed
result will then be written to the data latch.
Port A is an 8-bit bidirectional port (PA0–7) with interrupt capability,
shared with the A/D converter (AN1–6, VREFL, VREFH).
The port A data register is located at $0000 and the data direction register
(DDR) at $0004. Reset does not affect the data registers, but clears the
data direction registers, thereby returning the ports to inputs. Writing a
one to a DDR bit sets the corresponding port bit to output mode.
When the A/D converter is turned on, one of the channels AN1–6 may
be selected through the A/D status and control register for conversion.
The input lines of port A include software programmable pull-up
resistors.
Freescale Semiconductor, Inc.
For More Information On This Product,
Latched Output
Figure 7-1 Port I/O Circuitry
Data Direction
Register Bit
Data Bit
Go to: www.freescale.com
Input/Output Ports
Input
Reg
Bit
Input
I/O
Output
Input/Output Ports
Pin
I/O
Technical Data
Port A

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