mc68hc05pv8 Freescale Semiconductor, Inc, mc68hc05pv8 Datasheet - Page 98

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mc68hc05pv8

Manufacturer Part Number
mc68hc05pv8
Description
Hcmos Microcontroller Unit
Manufacturer
Freescale Semiconductor, Inc
Datasheet
T echnical Data
7.4.5 Port A Interrupt Status Register
7.4.6 Operational Amplifier
Technical Data
PALIE – PA0–3 Interrupt Enable Lower Nibble
VRLEN – Enable A/D Low Reference Channel
PAIF0–7 – Port A Interrupt Flags
Pins PA4–6 are connected to an operational amplifier. The operational
amplifier is intended for amplifying small signals over VSS to increase
the resolution of the A/D converter. The output stage of this operational
amplifier is asymmetrical and thus optimized for driving loads to VSS
while keeping the quiescent current low. The output of the operational
amplifier is connected to channel 4 of the A/D converter. The amplifier is
enabled by the I/O configuration register Bit6. As long as IOCFG Bit6 is
0, the presence of the operational amplifier is without any effect. If the
opamp is enabled, first ensure that the PA4 is switched to input mode.
Reset:
$0024
Read:
Write:
This bit disables/enables the PA0–3 pins as interrupt group.
This bit connects the PA0 pin with the A/D low reference channel.
These flags indicate which of the port A interrupt requests is pending.
The 8 interrupt flags can be reset individually if a 1 is written to the bit
position.
Freescale Semiconductor, Inc.
For More Information On This Product,
1 = PA0–3 interrupt enabled
0 = PA0–3 interrupt disabled
1 = A/D low reference channel connected to external VREFL.
0 = A/D low reference channel connected to internal ground.
1 = Flag set when corresponding transition is sensed (if interrupt
0 = No interrupt. Writing a 0 has no effect
Figure 7-3 Port A Interrupt Status Register (PAISR)
PAIF7
Bit 7
enabled). Writing a 1 clears the flag
0
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PAIF6
Input/Output Ports
6
0
PAIF5
5
0
PAIF4
4
0
PAIF3
3
0
MC68HC(8)05PV8/A — Rev. 1.9
PAIF2
2
0
PAIF1
1
0
PAIF0
Bit 0
0

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