mc68hc11e0fnr2 Freescale Semiconductor, Inc, mc68hc11e0fnr2 Datasheet - Page 115

• Manufacturer Part Number: mc68hc11e0fnr2
• Description: Hc11 Microcontrollers
• Manufacturer: Freescale Semiconductor, Inc

SCR[2:0] — SCI Baud Rate Select Bits
Freescale Semiconductor
Selects receiver and transmitter bit rate based on output from baud rate prescaler stage. Refer to
Figure 7-8
The prescaler bits, SCP[2:0], determine the highest baud rate, and the SCR[2:0] bits select an
additional binary submultiple (÷1, ÷2, ÷4, through ÷128) of this highest baud rate. The result of these
two dividers in series is the 16X receiver baud rate clock. The SCR[2:0] bits are not affected by reset
and can be changed at any time, although they should not be changed when any SCI transfer is in
progress.
Figure 7-8
the highest baud rate. The rate select bits determine additional divide by two stages to arrive at the
receiver timing (RT) clock rate. The baud rate clock is the result of dividing the RT clock by 16.
and
and
Figure 7-9
Figure
XTAL
EXTAL
Figure 7-8. SCI Baud Rate Generator Block Diagram
7-9.
CLOCK GENERATOR
illustrate the SCI baud rate timing chain. The prescaler select bits determine
OSCILLATOR
AND
(÷4)
M68HC11E Family Data Sheet, Rev. 5.1
AS
E
÷
÷
÷
÷
÷
÷
÷
2
2
2
2
2
2
2
0:0
SCR[2:0]
0:0:0
0:0:1
0:1:0
0:1:1
1:0:0
1:0:1
1:1:0
1:1:1
÷
3
INTERNAL BUS CLOCK (PH2)
0:1
÷
4
1:0
BAUD RATE
BAUD RATE
TRANSMIT
RECEIVE
÷
(16X)
÷
(1X)
SCI
SCI
13
16
1:1
SCP[1:0]
SCI Registers
115