mc68hc11f1cpu5 Freescale Semiconductor, Inc, mc68hc11f1cpu5 Datasheet - Page 64

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mc68hc11f1cpu5

Manufacturer Part Number
mc68hc11f1cpu5
Description
8-bit Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
13 Pulse Accumulator
13.1 Pulse Accumulator Block Diagram
13.2 Pulse Accumulator Registers
TMSK2 — Timer Interrupt Mask 2
64
RESET:
MOTOROLA
MAIN TIMER
PAI/OC1
PA7/
FROM
FROM
DDRA
The pulse accumulator can be used either to count events or measure the duration of a particular event.
In event counting mode, the pulse accumulator’s 8-bit counter increments each time a specified edge
is detected on the pulse accumulator input pin, PA7. The maximum clocking rate for this mode is the E-
clock divided by two. In gated time accumulation mode, an internal clock increments the 8-bit counter
at a rate of E-clock
Bits [7:4] in TMSK2 correspond bit for bit with flag bits in TFLG2. Setting any of these bits enables the
corresponding interrupt source.
OC1
(FROM MAIN TIMER)
E 64 CLOCK
Bit 7
TOI
OUTPUT
BUFFER
0
RTII
64 while the input at PA7 remains at a predetermined logic level.
EDGE DETECTION
6
0
INPUT BUFFER
Figure 18 Pulse Accumulator Block Diagram
&
PAOVI
5
0
INTERRUPT ENABLES
TMSK2
CONTROL
PACTL
PAII
4
0
MUX
3
0
0
2:1
2
0
0
PAEN
CLOCK
PAEN
PAI EDGE
DATA BUS
INTERNAL
PR1
1
0
STATUS FLAGS
8-BIT COUNTER
OVERFLOW
PACNT
ENABLE
TFLG2
MC68HC11F1/FC0
MC68HC11FTS/D
Bit 0
PR0
0
INTERRUPT
REQUESTS
$x024
1
2

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