mpc8536e Freescale Semiconductor, Inc, mpc8536e Datasheet - Page 117

• Manufacturer Part Number: mpc8536e
• Description: Mpc8536e Powerquicctm Iii Integrated Processor Hardware Specifications
• Manufacturer: Freescale Semiconductor, Inc

3.7
The MPC8536E requires weak pull-up resistors (2–10 k Ω is recommended) on open drain type pins including I
MPIC interrupt pins.
Correct operation of the JTAG interface requires configuration of a group of system control pins as demonstrated in
Care must be taken to ensure that these pins are maintained at a valid deasserted state under normal operating conditions as most
have asynchronous behavior and spurious assertion will give unpredictable results.
The following pins must NOT be pulled down during power-on reset: TSEC1_TXD[3], HRESET_REQ,
TRIG_OUT/READY/QUIESCE, MSRCID[2:4], ASLEEP. The UART_SOUT[0:1] and TEST_SEL pins must be set to a
proper state during POR configuration. Please refer to the pinlist table (see
See the PCI 2.2 specification for all pull-ups required for PCI.
3.8
The MPC8536E drivers are characterized over process, voltage, and temperature. For all buses, the driver is a push-pull
single-ended driver type (open drain for I
To measure Z
value of each resistor is varied until the pad voltage is OV
components, the resistances of the pull-up and pull-down devices. When data is held high, SW1 is closed (SW2 is open) and
R
are designed to be close to each other in value. Then, Z
Table 81
105 ° C.
Freescale Semiconductor
P
is trimmed until the voltage at the pad equals OV
summarizes the signal impedance targets. The driver impedances are targeted at minimum V
Pull-Up and Pull-Down Resistor Requirements
Output Buffer DC Impedance
0
for the single-ended drivers, an external resistor is connected from the chip pad to OV
MPC8536E PowerQUICC™ III Integrated Processor Hardware Specifications, Rev. 2
Figure 77. Driver Impedance Measurement
Data
2
C).
DD
0
/2. R
= (R
DD
P
/2 (see
P
then becomes the resistance of the pull-up devices. R
+ R
N
)/2.
Figure
Pad
R
R
OV
OGND
N
P
Table
77). The output impedance is the average of two
DD
Pull-Up and Pull-Down Resistor Requirements
SW2
SW1
62) of the individual device for more details.
DD
DD
, nominal OV
or GND. Then, the
2
C pins and
Figure
P
and R
DD
,
78.
117
N