mpc850de Freescale Semiconductor, Inc, mpc850de Datasheet - Page 31

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mpc850de

Manufacturer Part Number
mpc850de
Description
Mpc850 Rev. A/b/c Communications Controller
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Figure 22 provides the interrupt detection timing for the external level-sensitive lines.
Figure 23 provides the interrupt detection timing for the external edge-sensitive lines.
Table 8 shows the PCMCIA timing for the MPC850.
MOTOROLA
Num
A[6–31], REG valid to PCMCIA strobe
asserted.
A[6–31], REG valid to ALE negation.
CLKOUT to REG valid
CLKOUT to REG Invalid.
CLKOUT to CE1, CE2 asserted.
CLKOUT to CE1, CE2 negated.
CLKOUT to PCOE, IORD, PCWE, IOWR
assert time.
CLKOUT to PCOE, IORD, PCWE, IOWR
negate time.
CLKOUT to ALE assert time
Figure 22. Interrupt Detection Timing for External Level Sensitive Lines
Figure 23. Interrupt Detection Timing for External Edge Sensitive Lines
1
Characteristic
MPC850 (Rev. A/B/C) Hardware Specifications
Table 8. PCMCIA Timing
1
13.00
18.00
5.00
6.00
5.00
5.00
2.00
5.00
Min
50MHz
13.00
13.00
13.00
11.00
11.00
13.00
Max
21.00
28.00
8.00
9.00
8.00
8.00
2.00
8.00
Min
66MHz
16.00
16.00
16.00
11.00
11.00
16.00
Max
17.00
23.00
6.00
7.00
6.00
6.00
2.00
6.00
Min
80 MHz
14.00
14.00
14.00
11.00
11.00
14.00
Max
Layout Practices
FFACTOR Unit
0.750
1.000
0.250
0.250
0.250
0.250
0.250
ns
ns
ns
ns
ns
ns
ns
ns
31

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