mpc82g516a Megawin Technology, mpc82g516a Datasheet
mpc82g516a
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... Auto-Reload Mode (Up or Down Counter)....................................................................................46 11.2.3 Baud Rate Generator Mode ..........................................................................................................47 This document contains information on a new product under development by Megawin. Megawin reserves the right to change or discontinue this product without notice. © Megawin Technology Co., Ltd. 2005 All rights reserved. 8-bit microcontroller Contents MPC82G516A 2008/06 version A3 MEGAWIN ...
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... ADC Operation....................................................................................................................... 82 16.3 Sample Code for ADC............................................................................................................ 83 16.4 Notes on ADC ........................................................................................................................ 84 16.4.1 A/D Conversion Time ....................................................................................................................84 16.4.2 I/O Pin Used with ADC Function ...................................................................................................84 16.4.3 Idle and Power-Down Mode..........................................................................................................84 16.4.4 Requirements on VDD Power Supply...........................................................................................84 17 Keypad Interrupt........................................................................................... 85 18 Watchdog Timer........................................................................................... 86 18.1 WDT Control Register ............................................................................................................ 86 18.2 WDT Operation ...................................................................................................................... 87 18.3 Sample Code for WDT ........................................................................................................... 87 MEGAWIN MPC82G516A Data Sheet 2 ...
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... Boolean Variable Manipulation ............................................................................................ 126 26.5 Program and Machine Control ............................................................................................. 127 27 Application Notes ....................................................................................... 128 27.1 Power Supply for 3.3V, 5V and Wide-Range Systems ........................................................ 128 27.1.1 Power Supply for a 3.3V System ................................................................................................128 27.1.2 Power Supply for Wide-Range System ..........................................................................129 27.2 Reset Circuit......................................................................................................................... 129 27.3 XTAL Oscillating Circuit ....................................................................................................... 130 3 MPC82G516A Data Sheet MEGAWIN ...
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... Ordering Information .................................................................................. 137 32 Package Outline......................................................................................... 138 40-Pin PDIP Package ................................................................................................................... 138 44-Pin PLCC Package .................................................................................................................. 139 44-Pin PQFP Package .................................................................................................................. 140 48-Pin LQFP Package .................................................................................................................. 141 28-Pin SSOP Package.................................................................................................................. 142 33 Disclaimers................................................................................................. 143 Life Support................................................................................................................................... 143 Right to Make Changes................................................................................................................. 143 Revision History ............................................................................................... 144 MEGAWIN MPC82G516A Data Sheet 4 ...
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... Figure 15-8. SPI Master Transfer Format with CPHA=1 ....................................................................................80 Figure 16-1. ADC Block Diagram........................................................................................................................81 Figure 18-1. WDT Block Diagram .......................................................................................................................86 Figure 19-1. Interrupt System .............................................................................................................................90 Figure 20-1. Flash Configuration ........................................................................................................................96 Figure 20-2. Flow Chart for “Flash Page Erase” .................................................................................................99 Figure 20-3. Flow Chart for “Flash Program” ....................................................................................................100 5 st UART .......................................................................................65 MPC82G516A Data Sheet MEGAWIN ...
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... Figure 27-2. Power Supplied to a 3.3V System ................................................................................................128 Figure 27-3. Power Supplied Wide-Range System..........................................................................129 Figure 27-4. Reset Circuit .................................................................................................................................129 Figure 27-5. XTAL Oscillating Circuit................................................................................................................130 Figure 28-1. Picture of the “8051 ICE Adapter” ................................................................................................131 Figure 28-2. System Diagram for the ICE Function..........................................................................................131 MEGAWIN MPC82G516A Data Sheet 6 ...
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... Table 15-1. SPI Master and Slave Selection ......................................................................................................77 Table 15-2. SPI Serial Clock Rates ....................................................................................................................78 Table 18-1. WDT Overflow Period ......................................................................................................................87 Table 19-1. Interrupt Sources .............................................................................................................................89 Table 19-2. Four Priority Level of External Interrupt 0........................................................................................93 Table 20-1. Comparison between the Various Programming Methods..............................................................95 Table 20-2. ISP Timing Setting ...........................................................................................................................97 Table 20-3. ISP Mode Select ..............................................................................................................................97 7 MPC82G516A Data Sheet MEGAWIN ...
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... The MPC82G516A has 64K bytes of embedded Flash memory for code and data. The Flash memory can be programmed either in parallel mode or in serial mode with the In-System Programming (ISP) and In-Circuit Programming (ICP) capability. And, it also provides the In-Application Programming (IAP) capability. ISP and ICP allow the user to download new code without removing the microcontroller from the actual end product ...
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... IAP (In-Application Programming) Flash for Applications with Non-volatile Data OCD (On-Chip Debug) Interface for ICE Flash Endurance: 20,000 Erase/Write cycles Operating Frequency 24MHz Power Supply: 2.4V~3.6V (for 3.3V System), or 2.7V~5.5V (for 5V or Wide-Range System) Industrial Temperature Range: -40 to +85 °C Packages: PDIP40, PLCC44, PQFP44, LQFP48 and SSOP28 9 MPC82G516A Data Sheet MEGAWIN ...
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... Block Diagram Figure 3-1 shows the functional block diagram of the MPC82G516A. It gives the outline of the device. The user can easily find all the device’s peripheral functions in the diagram. Figure 3-1. Block Diagram MPC82G516A VDD LDO Regulator and Power VSS Monitoring V30 RST ...
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... Pin Configuration 4.1 Pin Assignment Figure 4-1. Pin Assignment: 40-Pin PDIP Figure 4-2. Pin Assignment: 28-Pin SSOP 11 MPC82G516A Data Sheet MEGAWIN ...
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... Figure 4-3. Pin Assignment: 44-Pin PLCC Figure 4-4. Pin Assignment: 44-Pin PQFP MEGAWIN MPC82G516A Data Sheet 12 ...
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... Figure 4-5. Pin Assignment: 48-Pin LQFP 13 MPC82G516A Data Sheet MEGAWIN ...
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... MPC82G516A Data Sheet I/O DESCRIPTION TYPE I/O * Port 0 bit-0. I/O * AD0: multiplexed A0/D0 during external data memory access. I/O * Port 0 bit-1. I/O * AD1: multiplexed A1/D1 during external data memory access. I/O * Port 0 bit-2. I/O * AD2: multiplexed A2/D2 during external data memory access. I/O * Port 0 bit-3. ...
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... I I/O O MPC82G516A Data Sheet DESCRIPTION * Port 2 bit-0. * A8: A8 output during external data I memory access. * KBI0: keypad input 0. * Port 2 bit-1. * A9: A9 output during external data I memory access. * KBI1: keypad input 1. * Port 2 bit-2. * A10: A10 output during external data I memory access ...
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... MPC82G516A Data Sheet I/O DESCRIPTION TYPE I/O * Port 4 bit-0. I/O * Port 4 bit- ALE: Address Latch Enable, output pulse for latching the low byte of the address during an access to external data memory. I/O * Port 4 bit- /INT3: external interrupt 3 input. ...
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... P1.5 is moved to P4.5. ‘MISO’ function in P1.6 is moved to P4.6. ‘SPICLK’ function in P1.7 is moved to P4.7. P4S2: When set, the UART2 interface is directed to P4, as shown below. ‘S2RXD’ function in P1.2 is moved to P4.2. ‘S2TXD’ function in P1.3 is moved to P4. P4S2 GF2 - MPC82G516A Data Sheet DPS MEGAWIN ...
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... Note that, for the MPC82G516A, there is no capability of execution of external program. All the user’s program code are programmed in the on-chip Flash memory. So, the /EA and /PSEN signals are no more needed and thus omitted ...
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... Port 0 latch (the Special Function Register), thus obliterating whatever information the Port 0 SFR may have been holding. Note that in the MPC82G516A, there is no dedicated pin for ALE signal. The ALE becomes an alternate function of P3.5 or P4.1, which can be selected by control bits P35ALE and P41ALE in the AUXR register ...
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... Direct by Indirect Addressing External (SFRs) Addressing 80H Using MOVX with EXTRAM=0 0000H Bit-addressable Space (Bit Addresses 00H~7FH) Four Banks of 8 Registers R0~R7 (Bank Select Bits in PSW) MPC82G516A Data Sheet External Data Memory FFFFH Addressable by Indirect External Addressing Using MOVX with EXTRAM=1 0000H 20 ...
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... Figure 5-4. SFR Space FFH . . 1. I/O ports are register-mapped . 2. Addresses that end E8H Port are also bit-addressable. E0H ACC - Ports . . - Accumulator . - PSW D0H PSW (Etc B0H Port A0H Port 90H Port 80H Port 0 21 MPC82G516A Data Sheet MEGAWIN ...
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... Figure 5-5. External RAM Accessing by an 8-Bit Address (using ‘MOVX @ Ri’ and Page Bits) Note that in this case, the other bits of P2 are available as general I/O pins. Figure 5-6. External RAM Accessing by a 16-Bit Address (using ‘MOVX @ DPTR’) MEGAWIN MPC82G516A Data Sheet 22 ...
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... Declaration Identifiers in a C51-Compiler The declaration identifiers in a C51-compiler for the various MPC82G516A memory spaces are as follows: data 128 bytes of internal data memory space (00h~7Fh); accessed via direct or indirect addressing, using instructions other than MOVX and MOVC. All or part of the Stack may be in this area. ...
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... AUXR1 - - S2BUF - - P1M1 P0M0 P0M1 TL0 TL1 TH0 DPL DPH SPSTAT Note that new added SFRs are marked by the blue bold. MPC82G516A Data Sheet CCAP3H CCAP4H CCAP5H PCAPWM3 PCAPWM4 PCAPWM5 CCAP3L CCAP4L CCAP5L IFMT SCMD ISPCR CCAPM3 CCAPM4 CCAPM5 KBPATN KBCON ...
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... The OV bit is cleared the ADD, ADDC, SUBB, MUL, and DIV instructions in all other cases. P: Parity flag. Set/cleared by hardware each instruction cycle to indicate an odd/even number of “one” bits in the Accumulator, i.e., even parity. (Note: PSW register is bit-addressable. All the released bits can be set and cleared by software in bit-level RS1 RS2 OV MPC82G516A Data Sheet MEGAWIN ...
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... EXF2 RCLK 8CH 8AH 8DH 8BH CDH CCH CBH CAH 9FH 9EH 9DH 98H SM0/FE SM1 SM2 99H SMOD SMOD0 - 87H MPC82G516A Data Sheet Bit-4 Bit-3 Bit-2 Bit-1 E4H E3H E2H E1H ACC.4 ACC.3 ACC.2 ACC.1 F4H F3H F2H F1H B.4 B.3 B.2 B.1 D4H ...
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... SADEN.7 SADEN.6 SADEN.5 SADEN.4 SADEN.3 SADEN.2 SADEN.1 SADDR.7 SADDR.6 SADDR.5 SADDR.4 SADDR.3 SADDR.2 SADDR.1 S2SM0 S2SM1 S2SM2 S2REN ADCON SPEED1 SPEED0 ADCI SSIG SPEN DORD MSTR SPIF WCOL - - MPC82G516A Data Sheet Bit-3 Bit-2 Bit-1 Bit-0 C3H C2H C1H C0H PX2 EX2 IE2 IT2 PT1H PX1H PT0H ...
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... A2H T0X12 T1X12 URM0X6 A6H - - - C9H - - ALES1 8FH - - - C7H WRF - ENW E1H EOPFI ECPFI OPF 97H MPC82G516A Data Sheet DCH DBH DAH D9H CCF4 CCF3 CCF2 CCF1 - - CPS2 CPS1 CAPN0 MAT0 TOG0 PWM0 CAPN1 MAT1 TOG1 PWM1 CAPN2 MAT2 TOG2 PWM2 ...
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... IFADRL E4H Low-byte IFD ISP Flash Data E2H ISP Sequential SCMD E6H Command Notes: *: Bit addressable -: Reserved bit # : Reset value depends on reset source. 29 ISPEN SWBS SWRST - - - - - MPC82G516A Data Sheet - CKS2 CKS1 CKS0 - - MS1 MS0 MEGAWIN 00H 63H 00H 00H FFH xxH ...
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... After being compiled, the variables declared by “xdata” will become the memories accessed by “MOVX @DPTR”. The user can get the following descriptions from the “Keil Software — Cx51 Compiler User’s Guide”. Table 7-1. Declaration of XRAM Memory Type MEGAWIN EXTRAM MPC82G516A Data Sheet ...
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... ALE-Pin Configuration For the MPC82G516A, there is no dedicated pin for ALE signal. The ALE becomes an alternate function of P3.5 or P4.1, which can be selected by control bits P35ALE and P41ALE in the AUXR register, as shown below. And, although an 80C51 MCU always outputs the ALE signal even there in no external accessing, the device doesn’t output any ALE signal except when accessing the external data memory (EXTRAM=1) ...
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... MOVX read/write pulse is 6 clock cycles. 110: 6 clocks stretched, the MOVX read/write pulse is 7 clock cycles. 111: 7 clocks stretched, the MOVX read/write pulse is 8 clock cycles. See the following timing waveforms for demonstration. MEGAWIN ALES0 - RWS2 MPC82G516A Data Sheet 1 0 RWS1 RWS0 32 ...
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... Setup-time: 2 Clocks {ALES1,ALES0}={1,0} & {RWS2,RWS1,RWS0}={0,1, Weak High-byte Address Pulled Up Weak Low-byte Addr. Pulled Up MOVX Write Cycle High-byte Address Stretched Hold-time: 2 Clocks MOVX Write Cycle MPC82G516A Data Sheet 6 7 Data Data Stretched Write-pulse: 3 Clocks 14 MEGAWIN ...
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... Weak High-byte Address Pulled Up Weak Low-byte Addr. Pulled Up MOVX Read Cycle {ALES1,ALES0}={0,0} & {RWS2,RWS1,RWS0}={0,0, High-byte Address Stretched Hold-time: 2 Clocks MOVX Read Cycle {ALES1,ALES0}={1,0} & {RWS2,RWS1,RWS0}={0,1,1} MPC82G516A Data Sheet Data Data Stretched Write-pulse: 3 Clocks 14 34 ...
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... DPS: DPTR select bit, used to switch between DPTR0 and DPTR1. The DPS bit status should be saved by software when switching between DPTR0 and DPTR1. DPS DPS=0 DPS=1 Selected by DPS P4S2 GF2 - DPTR selected DPTR0 DPTR1 MPC82G516A Data Sheet External Data Memory DPS MEGAWIN ...
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... I/O Port Structure and Operation The MPC82G516A has five I/O ports: Port 0, Port 1, Port2, Port 3 and Port4. All ports are 8-bit ports. The exact number of I/O pins available depends upon the package types. See Table 10-1. Table 10-1. Number of I/O Pins Available Package Type 40-pin DIP 28-pin SSOP ...
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... Figure 10-1. Quasi-Bidirectional I P2M1.3 P2M1.2 P2M1 P3M0.3 P3M0.2 P3M0 P3M1.3 P3M1.2 P3M1 P4M0.3 P4M0.2 P4M0 P4M1.3 P4M1.2 P4M1.1 MPC82G516A Data Sheet 0 P2M1.0 0 P3M0.0 0 P3M1.0 0 P4M0.0 0 P4M1.0 MEGAWIN ...
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... The push-pull mode may be used when more source current is needed from a port output. In addition, the input path of the port pin in this configuration is also the same as quasi-bidirectional mode. The push-pull port configuration is shown in Figure 10-4. A push-pull port pin also has a Schmitt-triggered input for noise suppression. Figure 10-4. Push-Pull Output MEGAWIN MPC82G516A Data Sheet 38 ...
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... Input-Only mode. 10.3 Additional Note for I/O Port Every output on the MPC82G516A has been designed to sink typical LED drive current. However, there is a maximum total output current for all ports which must not be exceeded. Please refer to Maximum Ratings ...
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... Timers/Counters The MPC82G516A has three 16-bit Timer/Counters: Timer 0, Timer 1 and Timer 2. Each consists of two 8-bit registers, THx and TLx (where 2). All of them can be configured to operate either as timers or event counters. In the Timer function, the TLx register is incremented every 12-clock cycle or 1-clock cycle, which is selectable by software ...
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... T1X12 T1 Pin TR1 GATE /INT1 pin * Fosc is the system clock TR0 IE1 IT1 IE0 S2TR S2SMOD S2TX12 S2CKOE TL1 (5 Bits) C/-T MPC82G516A Data Sheet 1 0 IT0 1 0 T0CKOE TH1 Overflow TF1 (8 Bits) Timer 1 Interrupt MEGAWIN ...
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... T1X12 T1 Pin TR1 GATE /INT1 pin * Fosc is the system clock. MEGAWIN "0" TL1 (8 Bits) "1" C/-T "0" "1" C/-T MPC82G516A Data Sheet TH1 Overflow TF1 (8 Bits) TL1 Overflow TF1 (8 Bits) Load TH1 (8 Bits) Timer 1 Interrupt Timer 1 Interrupt ...
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... T0X12 T0 Pin TR0 GATE /INT0 pin Fosc 12 "0" "1" T0X12 * Fosc is the system clock. 43 "0" TL0 (8 Bits) "1" C/-T TH0 (8 Bits) TR1 MPC82G516A Data Sheet Overflow Timer 0 TF0 Interrupt Overflow Timer 1 TF1 Interrupt MEGAWIN ...
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... Start the timer by setting the run control bit TR0 in TCON register. Figure 11-5. Programmable Clock-Out from Timer 0 Fosc 12 "0" "1" T0X12 TR0 GATE=0 /INT1 pin * Fosc is the system clock. MEGAWIN Fosc n x (256-TH0) n=24 if T0X12=0, n=2 if T0X12=1. "0" TL0 (8 Bits) C/-T=0 TH0 (8 Bits) MPC82G516A Data Sheet D Clock-Out Q (P3.4) Overflow CK Q Load 44 ...
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... TCLK EXEN2 TR2 C/- T2OE DCEN T2OE (Timer Off Baud-rate Generator 16-bit Capture 16-bit Auto-reload (counting-up only 16-bit Auto-reload (counting-up or counting-down Programmable clock-out 1 MPC82G516A Data Sheet 1 0 CP/-RL2 1 0 DCEN Mode MEGAWIN ...
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... The external flag EXF2 toggles when Timer 2 underflows or overflows. This EXF2 bit can be used as a 17th bit of resolution if needed. The EXF2 flag does not generate an interrupt in this mode. MEGAWIN TL2 TH2 (8 Bits) (8 Bits) TR2 Capture RCAP2L RCAP2H EXEN2 MPC82G516A Data Sheet Overflow TF2 EXF2 Timer 2 Interrupt 46 ...
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... Down Counting Reload Value FFH FFH Reload TL2 TH2 Overflow (8 Bits) (8 Bits) TR2 Reload RCAP2L RCAP2H Up Counting Reload Value Timer 2 Overflow Rate 16 MPC82G516A Data Sheet Overflow TF2 EXF2 Toggle TF2 Counting Direction Down T2EX Pin (P1.1) MEGAWIN Timer 2 Interrupt EXF2 Timer 2 ...
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... EXEN2 MEGAWIN Fosc 65536 - [RCAP2H,RCAP2L] ) Fosc 32 x Baud Rate TL2 TH2 (8 Bits) (8 Bits) TR2 Reload RCAP2L RCAP2H Timer 2 EXF2 Interrupt MPC82G516A Data Sheet Timer 1 Overflow 2 "0" "1" SMOD Overflow "1" "0" RCLK 16 "1" "0" ...
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... FFH FFH Timer 2 in Baud Rate Generator Mode RCAP2H F7H FBH FDH FEH FEH FFH FFH FFH FFH FFH FFH FFH FFH MPC82G516A Data Sheet RCAP2L 80H C0H 80H E0H 70H A0H B8H D0H DCH EEH F4H FAH FDH RCAP2L 00H ...
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... Figure 11-10. Programmable Clock-Out from Timer 2 Note: Divided by 2, not by 12. Fosc 2 C/-T2=0 Transition Detector T2EX Pin (P1.1) EXEN2 * Fosc is the system clock. MEGAWIN Fosc 4 x (65536-[RCAP2H,RCAP2L]) TL2 TH2 (8 Bits) (8 Bits) TR2 RCAP2L RCAP2H Timer 2 EXF2 Interrupt MPC82G516A Data Sheet D Q Overflow CK Q Reload Clock-Out (P1.0) 50 ...
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... The serial port control and status register is the special function register SCON. This register contains not only the mode selection bits, but also the 9th data bit for transmit and receive (TB8 and RB8), and the serial port interrupt bits (TI and RI). 51 MPC82G516A Data Sheet MEGAWIN ...
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... Mode 2 Baud Rate = MEGAWIN REN TB8 RB8 Baud Rate Fosc/12 or Fosc/2 * Variable Fosc/64 or Fosc/32 Variable POF GF1 GF0 S2TR S2SMOD S2TX12 S2CKOE T0CKOE SMOD 2 x Fosc 64 MPC82G516A Data Sheet Note: dependent on bit URM0X6 IDL ...
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... T1X12 bit is in AUXR2 register.) TH1, the Reload Value T1X12=0 SMOD=1 SMOD 160 - 208 - 224 64 232 112 244 184 248 208 250 220 252 232 253 238 - 247 255 250 - 253 MPC82G516A Data Sheet T1X12=1 SMOD 112 160 184 208 220 238 244 250 MEGAWIN ...
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... MEGAWIN TH1, the Reload Value T1X12=0 SMOD=1 SMOD 160 192 208 232 240 244 248 250 253 254 255 MPC82G516A Data Sheet T1X12=1 SMOD 112 - 160 64 184 112 208 160 220 184 238 220 244 ...
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... RXD. The value accepted is the value that was seen in at least 2 of the 3 samples. This is done for noise rejection. If the value accepted during the first bit time is not 0, the receive circuits are reset and the unit goes back to looking for another 1-to-0 transition. This is to provide rejection of 55 MPC82G516A Data Sheet MEGAWIN ...
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... RB8, and the first 8 data bits go into SBUF. One bit time later, whether the above conditions were met or not, the unit goes back to looking for a 1-to-0 transition at the RXD input. MEGAWIN MPC82G516A Data Sheet 56 ...
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... Figure 12-1. Serial Port Mode 0 57 MPC82G516A Data Sheet MEGAWIN ...
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... Figure 12-2. Serial Port Mode 1 MEGAWIN MPC82G516A Data Sheet 58 ...
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... Figure 12-3. Serial Port Mode 2 59 MPC82G516A Data Sheet MEGAWIN ...
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... Figure 12-4. Serial Port Mode 3 MEGAWIN MPC82G516A Data Sheet 60 ...
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... ANDed with the SADDR to create the “Given” address which the master will use for addressing each of the slaves. Use of the Given address allows multiple slaves to be recognized while excluding others. The following examples will help to show the versatility of this scheme: 61 MPC82G516A Data Sheet MEGAWIN ...
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... Figure 12-6. UART Multiprocessor Communication, Auto Address Recognition MEGAWIN Slave 1 SADDR = 1100 0000 SADEN = 1111 1110 Given = 1100 000X Slave 1 SADDR = 1110 0000 SADEN = 1111 1010 Given = 1110 0X0X MPC82G516A Data Sheet Slave 2 SADDR = 1110 0000 SADEN = 1111 1100 Given = 1110 00XX 62 ...
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... Secondary UART (UART2) The MPC82G516A is equipped with a secondary UART (hereafter, called UART2), which also has four operation modes the same as the first UART except the following differences: (1) The UART2 has no enhanced functions: Framing Error Detection and Auto Address Recognition. (2) The UART2 use the dedicated Baud Rate Timer as its Baud Rate Generator. ...
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... Mode 0 If URM0X6=0, Mode 0 Baud Rate = If URM0X6=1, Mode 0 Baud Rate = 13.2.2 Mode 1 and Mode 3 Mode 1, 3 Baud Rate = Where, n=12 if S2X12=0, n=1 if S2X12=1. 13.2.3 Mode 2 Mode 2 Baud Rate = MEGAWIN Fosc 12 Fosc 2 S2SMOD 2 Fosc (256-S2BRT) S2SMOD 2 x Fosc 64 MPC82G516A Data Sheet 1 0 EXTRAM - Section 13-3.) 64 ...
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... RCLK=0, TCLK=0 and URTS=1. In this condition, Timer 1 is free for other application. Of course, if UART2 (Mode 1 or Mode 3) is also operated at this time, these two UARTs will have the same baud rates. Figure 13-1. New Baud Rate Source for the UART MPC82G516A Data Sheet MEGAWIN ...
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... Start the timer by setting the run control bit S2TR in AUXR2 register. Figure 13-2. Programmable Clock-Out from UART2 Baud Rate Timer Fosc 12 MEGAWIN Fosc n x (256-S2BRT) n=24 if S2X12=0, n=2 if S2X12=1. "0" Counter (8 Bits) "1" S2TR S2X12 S2BRT (8 Bits) MPC82G516A Data Sheet D Clock-Out Q (P3.5) Overflow ...
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... Programmable Counter Array (PCA) The MPC82G516A is equipped with a Programmable Counter Array (PCA), which provides more timing capabilities with less CPU intervention than the standard timer/counters. Its advantages include reduced software overhead and improved accuracy. 14.1 PCA Overview The PCA consists of a dedicated timer/counter which serves as the time base for an array of six compare/ capture modules ...
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... Set by hardware when a match or capture occurs. Must be cleared by software. MEGAWIN CIDL - - - - CPS1 CPS0 CF CR CCF5 CCF4 CCF3 CPS1 Fosc is the system clock CCF4 CCF3 CCF2 MPC82G516A Data Sheet To PCA Modules CH CL 16-bit Up Counter CMOD ECF CCF2 CCF1 CCF0 CCON 1 0 CPS0 ECF 1 0 CCF1 CCF0 PCA Interrupt 68 ...
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... PCAPWMn is used to improve the range of the duty cycle of the output. The improved range of the duty cycle 69 CMOD.0 ECF CF CR CCF5 CCF4 MATn TOGn PWMn MPC82G516A Data Sheet CCF3 CCF2 CCF1 CCF0 CCON AUXIE.2 IE.7 EPCA EA To Interrupt Priority Processing 0 ECCFn MEGAWIN ...
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... X 16-bit capture by a positive-edge trigger on CEXn 16-bit capture by a negative-edge trigger on CEXn 16-bit capture by a transition on CEXn 16-bit Software Timer 16-bit High Speed Output 8-bit Pulse Width Modulator (PWM) MPC82G516A Data Sheet 1 0 Module Function 70 ...
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... In this mode the CEX output associated with the PCA module will toggle each time a match occurs between the PCA counter and the module’s capture registers. To activate this mode, the TOG, MAT and ECOM bits in the module’s CCAPMn register must be set. Figure 14-6. PCA High Speed Output Mode 71 MPC82G516A Data Sheet MEGAWIN ...
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... If ECAPnH=0 & CCAPnH=0x00 (i.e., 0x000), the duty cycle is 100 ECAPnH=0 & CCAPnH=0x40 (i.e., 0x040) the duty cycle is 75 ECAPnH=0 & CCAPnH=0xC0 (i.e., 0x0C0), the duty cycle is 25 ECAPnH=1 & CCAPnH=0x00 (i.e., 0x100), the duty cycle is 0%. Figure 14-7. PCA PWM Mode MEGAWIN MPC82G516A Data Sheet th bit, 72 ...
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... Serial Peripheral Interface (SPI) The MPC82G516A provides a high-speed serial communication interface, the SPI interface. SPI is a full-duplex, high-speed and synchronous communication bus with two operation modes: Master mode and Slave mode Mbps can be supported in either Master or Slave mode under a 12MHz system clock. It has a Transfer Completion Flag (SPIF) and Write Collision Flag (WCOL) in the SPI status register (SPSTAT) ...
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... SPDAT (Address=86H, SPI Data Register, Reset Value=0000,0000B (MSB) SPDAT has two physical buffers for writing to and reading from during transmit and receive, respectively. MEGAWIN MSTR CPOL CPHA SPR1 MPC82G516A Data Sheet 1 0 SPR0 (LSB) Section 15.6: Write 74 ...
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... When any device initiates a transfer, it can configure P1 output and drive it low to force a “mode change to slave” in the other device. (See Figure 15-3. SPI dual device configuration, where either can be a master or a slave 75 Section 15.5: Mode change on MPC82G516A Data Sheet /SS-pin) MEGAWIN ...
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... Single Master & Multiple Slaves For the master: any port pin, including P1.4 (/SS), can be used to drive the /SS pins of the slaves. For all the slaves: SSIG is ‘0’, and /SS pin are used to determine whether it is selected. Figure 15-4. SPI single master multiple slaves configuration MEGAWIN MPC82G516A Data Sheet 76 ...
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... Master output (active) 0 Slave output input 1 Master input output MPC82G516A Data Sheet SPICLK Remarks -pin P1.4~P1.7 are used as general input port pins. input Selected as slave. input Not selected. Mode change to slave if /SS pin is driven low, and MSTR input will be cleared to ‘0’ by H/W automatically ...
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... The SPI clock rate selection (in master mode) uses the SPR1 and SPR0 bits in the SPCTL register, as shown in Table 15-2. Table 15-2. SPI Serial Clock Rates SPR1 SPR0 SPI Clock Rate @ Fosc=12MHz Where, Fosc is the system clock. MEGAWIN Fosc divided by 3 MHz 750 KHz 187.5 KHz 93.75 KHz MPC82G516A Data Sheet 128 78 ...
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... Clock Phase Bit (CPHA) allows the user to set the edges for sampling and changing data. The Clock Polarity bit, CPOL, allows the user to set the clock polarity. The following figures show the different settings of Clock Phase Bit, CPHA. Figure 15-5. SPI Slave Transfer Format with CPHA=0 Figure 15-6. Slave Transfer Format with CPHA=1 79 MPC82G516A Data Sheet MEGAWIN ...
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... Figure 15-7. SPI Master Transfer Format with CPHA=0 Figure 15-8. SPI Master Transfer Format with CPHA=1 MEGAWIN MPC82G516A Data Sheet 80 ...
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... A/D Converter The MPC82G516A has one 10-bit, 8-channel multiplexed inputs analog-to-digital converter, which is implemented with successive approximation register (SAR) approach. Figure 16-1 shows the block diagram of the A/D converter. The eight multiplexed analog inputs share input pins with Port 1. The multiplexed input has a sample and hold circuit to feed the input analog voltage to the comparator input, and the output of the comparator is fed to the SAR for successive approximating operation ...
Page 82
... Vref+ – 3/2 LSB and Vref+, the conversion result will be 11,1111,1111B = 3FFH. Where: - Vref+ Vref- 1 LSB = 1024 MEGAWIN (B6) (B5) (B4 (B4) (B3) (B2) - Vin Vref- AIN Analog Input Voltage VDD Voltage Vref+ Vref- VDD = 1024 MPC82G516A Data Sheet 1 0 EXTRAM - 1 0 (B3) (B2 (B1) (B0 (B9) (B8 (B1) (B0) 82 ...
Page 83
... ADC result is in the ADCH and ADCL. ;... ;... 83 ;ADCON=1, turn on ADC hardware ;(SPEED1,SPEED0)=(1,1), Conv. Time= 270 clock cycles ;select AIN0 (P1.2) as analog input ;P1M0,bit2=1 ;configure P1.2 as Input-Only Mode ;P1M1,bit2=0 ; ;ADRJ=0: ADCH contains B9~B2; ADCL contains B1,B0 Start A-to-D conversion ;wait until ADCI=1 conversion completed MPC82G516A Data Sheet MEGAWIN ...
Page 84
... That is, the same Vin will get a different conversion result when the VDD voltage is changed, and therefore the VDD must be kept fixed for an absolute conversion. The user should pay attention to it! Since the VDD functions as the positive reference Vref+, the user should keep VDD as pure as possible in order to achieve the best ADC performance. MEGAWIN MPC82G516A Data Sheet 84 ...
Page 85
... KBMASK.2: When set, enables P2 cause of a Keypad Interrupt (KBI2). KBMASK.1: When set, enables P2 cause of a Keypad Interrupt (KBI1). KBMASK.0: When set, enables P2 cause of a Keypad Interrupt (KBI0 PATN_SEL MPC82G516A Data Sheet KBIF 1 0 MEGAWIN ...
Page 86
... PS2 PS1 PS0 Prescaler value 128 256 MEGAWIN CLRW WIDL PS2 (Note: Once set, this bit can only be cleared by power-on reset MPC82G516A Data Sheet 1 0 PS1 PS0 86 ...
Page 87
... WDTCR is a Write-only register) ;initialize the WDTCR buffer ;PS2=1 ;write to WDTCR (PS2,PS1,PS0)=(1,0,0), prescaler=32 ;ENW=1 ;write to WDTCR register enable WDT ;CLRW=0 ;write to WDTCR register clear WDT counter MPC82G516A Data Sheet Once the WDT is enabled Fosc=24MHz 32.768 ms 65.536 ms 131.072 ms 262.144 ms 1.048 s 524.288 ms 2.097 s 1.048 s 4 ...
Page 88
... HWENW WDTCR register at power-up: (1) set ENW bit, (2) load into WIDL bit, and HWWIDL (3) load into PS[2:0] bits. HWPS[2:0] MEGAWIN and HWPS[2:0], which should be programmed by a universal Writer or Section 25: MCU’s Hardware MPC82G516A Data Sheet Option.) 88 ...
Page 89
... Interrupt System The MPC82G516A has 14 interrupt sources with a four-level interrupt structure. There are several SFRs associated with the four-level interrupt. They are the IE, IP, IPH, AUXIE, AUXIP, AUXIPH, XICON and TCON. The IPH (Interrupt Priority High) and AUXIPH (Auxiliary Interrupt Priority High) registers make the four-level interrupt structure possible ...
Page 90
... ECCF5 OPF CPF S2RI S2TI KBIF MEGAWIN Interrupt Enable/Disable IE0 EX0 ET0 IE1 EX1 ET1 ES ET2 IE2 EX2 IE3 EX3 ESPI EADC EPCA EBD ES2 EKB EA Local Global Enable/ Enable/Disable Disable MPC82G516A Data Sheet Interrupt Priority Control Nested Four-Level Priority Precessing 90 ...
Page 91
... EADC: ADC interrupt enable bit. ESPI: SPI interrupt enable bit ET1 EX1 ET0 PT1 PX1 PT0 PSH PT1H PX1H PT0H ES2 EBD EPCA EADC MPC82G516A Data Sheet 1 0 EX0 1 0 PX0 1 0 PX0H 1 0 ESPI MEGAWIN ...
Page 92
... IT0: Interrupt 0 Type control bit. Set/cleared by software to specify falling edge/low level triggered external interrupt 0. MEGAWIN PS2 PBD PPCA PS2H PBDH PPCAH IT3 PX2 EX2 TR0 IE1 IT1 MPC82G516A Data Sheet 1 0 PADC PSPI 1 0 PADCH PSPIH 1 0 IE2 IT2 1 0 IE0 IT0 92 ...
Page 93
... Every polling cycle is new. The processor acknowledges an interrupt request by executing a hardware-generated LCALL to the appropriate servicing routine. In some cases it also clears the flag that generated the interrupt, and in other cases it doesn’ Priority Level Level 0 (Lowest) Level 1 Level 2 Level 3 (Highest) MPC82G516A Data Sheet MEGAWIN ...
Page 94
... Interrupt 0 routine and stay there until INT0 is pulsed (from low to high to low). Then it will execute RETI, go back to the task program, execute one instruction, and immediately re-enter the External Interrupt 0 routine to await the next pulsing of P3.2. One step of the task program is executed each time P3.2 is pulsed. MEGAWIN MPC82G516A Data Sheet 94 ...
Page 95
... In-Application Programming method (IAP): under control of the user’s application program. (4) In-Circuit Programming (ICP): under control of the proprietary ICP Programmer (see Refer to Figure 20-1 for the MPC82G516A Flash Configuration. The Flash of MPC82G516A can be partitioned into AP-memory, IAP-memory and ISP-memory. AP-memory is used to store the user’s application program; IAP- memory is used to store the non-volatile application data ...
Page 96
... Endurance: 20,000 Erase/Write Cycles. 20.1.2 Flash Configuration Figure 20-1 shows the Flash configuration of MPC82G516A. The Flash an be partitioned into AP-memory, IAP- memory and ISP-memory. AP-memory is used to store the user’s application program; IAP-memory is used to store the non-volatile application data; and, ISP-memory is used to store the loader program for In-System Programming. The total Flash size is 64K bytes, where the space of IAP-memory and ISP-memory can be configured by a Universal Programmer, the “ ...
Page 97
... Read Mode: Read data from Flash specified by the byte address in [IFADRH,IFADRL] 97 Bit-4 Bit-3 Bit-2 Bit CKS2 CKS1 > < 1 Bit-4 Bit-3 Bit-2 Bit MS2 MS1 ISP Mode Standby Read Program Page Erase MPC82G516A Data Sheet Bit-0 CKS0 Bit-0 MS0 MEGAWIN ...
Page 98
... SCMD (Address=E6H, ISP Sequential Command Register, Reset Value=0000,0000B) Bit-7 Bit-6 Bit-5 (ISP-Triggering Command) To trigger the ISP processing, write 0x46 then 0xB9 to this register in sequence. MEGAWIN Bit-4 Bit-3 Bit-2 Bit-4 Bit-3 Bit-2 Bit-4 Bit-3 Bit-2 Bit-4 Bit-3 Bit-2 MPC82G516A Data Sheet Bit-1 Bit-0 Bit-1 Bit-0 Bit-1 Bit-0 Bit-1 Bit-0 98 ...
Page 99
... MCU will halt here until processing completed 99 Start Refer to Table 20-2-1a to initialize ISPCR[2: means the N N=0 NO End of page? YES End ;ISPCR[2:0]=011, suppose MPC82-series running @11.0592MHz ;select Page Erase Mode ;fill [IFADRH,IFADRL] with page address ; ;trigger ISP processing ; MPC82G516A Data Sheet page. N=N+1 MEGAWIN ...
Page 100
... MCU will halt here until processing completed MEGAWIN Start Address=0x0000 NO End of address? YES End ;ISPCR[2:0]=011, suppose MPC82-series running @11.0592MHz ;select Program Mode ;fill [IFADRH,IFADRL] with byte address ; ;fill IFD with the data to be programmed ;trigger ISP processing ; MPC82G516A Data Sheet Refer to Table 20-2-1a to initialize ISPCR[2:0] Address=Address+1 100 ...
Page 101
... End of address? YES ISP pass ;ISPCR[2:0]=011, suppose MPC82-series running @11.0592MHz ;select Read Mode ;fill [IFADRH,IFADRL] with byte address ; ;trigger ISP processing ; ;now, the read data exists in IFD ;and, the user can check if the data is correct MPC82G516A Data Sheet Address=Address+1 MEGAWIN ...
Page 102
... HWBS2. NO YES ISPCR=ISPCR&0xBF; //SWBS=0, //select software-boot from AP-memory ISPCR=ISPCR|0x20; //SWRST=1, //trigger software reset to reboot from AP-memory MCU will re-boot from AP-memory, and run the normal "Application code" End MPC82G516A Data Sheet code. There are two methods to implement the 102 ...
Page 103
... Do Flash Read to verify for the flow chart the programmed data 103 . . . . . NO YES NO YES ISPCR=ISPCR&0xBF; //SWBS=0, //select software-boot from AP-memory ISPCR=ISPCR|0x20; //SWRST=1, //trigger software reset to reboot from AP-memory MCU will re-boot from AP-memory, and run the normal "Application code" End MPC82G516A Data Sheet MEGAWIN ...
Page 104
... To ensure a successful programming using ISP, the power coming from LDO output and supplied to the Flash memory should be higher than 2.4V (see Figure 23-1). The user may enable the hardware option LVFWP for write protection during the LDO output power falls below 2.4V during ISP processing. Refer to Hardware Option. MEGAWIN MPC82G516A Data Sheet Section 25: MCU’s 104 ...
Page 105
... Figure 20-8. System Diagram for the ISP Function Target System ISP Interface MPC82G516A VDD (less than 30cm) VDD DTA P3.1 GND VSS With standard 'ISP code' preprogrammed in the ISP-memory 105 "Megawin 8051 ISP Programmer" MEGAWIN VCC MAKE YOU WIN SDA ISP Programmer GND MPC82G516A Data Sheet PC USB MEGAWIN ...
Page 106
... Figure 20-9. System Diagram for ISP via COM Port Target System MPC82G516A TXD P3.1 RXD P3.0 With Megawin -provided 'ISP code' preprogrammed in the ISP-memory MEGAWIN RS232 Transceiver (such as MAX232 T_IN T_OUT R_OUT R_IN RS232 Connector MPC82G516A Data Sheet PC COM Port RS232 Cable 106 ...
Page 107
... Section 20.2.2) can also be applied to the IAP operation. Prior to using the IAP function, there must exist an IAP-memory. For the MPC82G516A, the user can configure an IAP-memory by a Universal Programmer, the “Megawin 8051 Writer” or the “Megawin 8051 ICP Programmer” (see 20.3.1 Update the Data in the IAP-memory Because the Flash can only perform page erasing, and only the 0xFF byte can be programmed into a non-0xFF byte ...
Page 108
... IFD with the data to be programmed ;trigger ISP processing ; ;ISPCR[2:0]=011, suppose MPC82-series running @11.0592MHz ;select Read Mode ;fill [IFADRH,IFADRL] with byte address ;! the byte address must be within the IAP-memory ;trigger ISP processing ; ;now, the read data exists in IFD MPC82G516A Data Sheet 108 ...
Page 109
... To ensure a successful programming using IAP, the power coming from LDO output and supplied to the Flash memory should be higher than 2.4V (see Figure 23-1). The user may enable the hardware option LVFWP for write protection during the LDO output power falls below 2.4V during ISP processing. Refer to Hardware Option. 109 MPC82G516A Data Sheet Section 25: MCU’s MEGAWIN ...
Page 110
... On-Chip Debug path), the ICP can update the MCU without removing the MCU chip from the actual end product, just like the ISP does. 20.4.1 The “Megawin 8051 ICP Programmer” Only the proprietary “Megawin 8051 ICP Programmer” can support the In-Circuit Programming of MPC82G516A. This section gives a rough description for it. Features No need to have a loader program pre-programmed in the target MCU. Dedicated serial interface ...
Page 111
... Power Saving Modes The MPC82G516A has two power-saving modes and an 8-bit system clock prescaler to reduce the power consumption. In the Idle mode the CPU is frozen while the peripherals and the interrupt system are still operating. In the Power-down mode the RAM and SFRs’ value are saved and all other functions are inoperative; most importantly, in the Power-down mode the device can be waked up by the external interrupts ...
Page 112
... MEGAWIN ;P3.2 ;IE.7 ;IE.0 ;/INT0 interrupt vector, address=0003h ;pull high P3.2 ;clear /INT0 interrupt flag ;may select falling-edge/low-level triggered ;enable global interrupt ;enable /INT0 interrupt ;put MCU into power-down mode ;! Note: here must be a NOP MPC82G516A Data Sheet 112 ...
Page 113
... In principle, the lower operating speed should not affect the system’s normal function. Then, restore its normal speed in the other program segments. 113 Section 22 non-0/0/0 value. The user should examine which MPC82G516A Data Sheet MEGAWIN ...
Page 114
... Built-in Oscillator The MPC82G516A has a built-in oscillator with the rough oscillating frequency of 6MHz. It can be used to replace the external crystal oscillator in the application which doesn’t need an exact oscillating frequency. To enable the built-in oscillator, the user should enable the hardware option ENROSC by a universal Writer/Programmer. ...
Page 115
... Power Monitoring Function The MPC82G516A incorporates power monitoring functions designed to prevent incorrect operation during initial power-up and power loss or reduction during operation. This is accomplished with two hardware functions: Power-on Detection and Brownout Detection. Figure 23-1 shows the block diagram of power monitoring function. ...
Page 116
... PMUOFF: Set to turn off the Power Monitor Unit to save power consumption while power monitoring function is not used. Note all the reserved bits in this register must be kept ‘0’. MEGAWIN Option CPF PMUOFF (Reserved) (Reserved) (Reserved) MPC82G516A Data Sheet (3.7V), the OPF flag will be OPF (2.4V), the CPF flag will be set by CPF 1 0 116 ...
Page 117
... And, the user needs to service it to avoid an overflow, which will generate an internal reset signal. 117 ENLVRO Brownout Reset ENLVRC (the POR threshold voltage). And, the reset state is POR . During a power cycle, VDD must fall below V POR Section 30: DC Characteristics MPC82G516A Data Sheet Internal Reset POR for V . POR MEGAWIN ...
Page 118
... SWRST: Write ‘1’ to this bit to trigger a software reset. 24.5 Brownout Reset from Power Monitor To trigger an internal reset when brownout occurs, the hardware option ENLVRO or ENLVRC should be enabled. (Refer to Section 25: MCU’s Hardware MEGAWIN Bit-4 Bit-3 Bit CKS2 Option). MPC82G516A Data Sheet Bit-1 Bit-0 CKS1 CKS0 118 ...
Page 119
... The hardware options can only be programmed by a Universal Programmer, the “Megawin 8051 Writer” or the “Megawin 8051 ICP Programmer”. After whole-chip erased, all the hardware options are left in “disabled” state and there is no ISP-memory and IAP-memory configured. The MPC82G516A has the following Hardware Options: ISP-memory Space: The ISP-memory space is specified by its starting address ...
Page 120
... HWPS[2:0] into For example: If HWWIDL and HWPS[2:0] are programmed and 5, respectively, then initialized to be 0x2D when MCU is powered up, as shown below. [disabled]: No action on Watch-dog Timer when the MCU is powered up. MEGAWIN bit, and bits. PS[2:0] MPC82G516A Data Sheet will be WDTCR 120 ...
Page 121
... Boolean processing. The MPC82G516A instruction set is fully compatible with those of the 80C51 except the execution time, i.e., the number of clock cycles required to execute an instruction. The shortest execution time is just one clock cycle and the longest is 7 clock cycles ...
Page 122
... Signed 8-bit offset byte. Used by SJMP and all conditional jumps. Range is –128 to +127 bytes rel relative to first byte of the following instruction. 128 direct bit-addressable bits in internal RAM, any I/O pin, control or status bit. bit MEGAWIN MPC82G516A Data Sheet 122 ...
Page 123
... DEC A Decrement register DEC Rn Decrement direct byte DEC direct Decrement indirect RAM DEC @Ri Multiply A and B MUL AB Divide DIV AB Decimal Adjust ACC DA A 123 Description MPC82G516A Data Sheet Execution Byte Clock Cycles ...
Page 124
... Rotate ACC Left RL A Rotate ACC Left through the Carry RLC A Rotate ACC Right RR A Rotate ACC Right through the Carry RRC A Swap nibbles within the ACC SWAP A MEGAWIN Description MPC82G516A Data Sheet Execution Byte Clock Cycles ...
Page 125
... For the control bit EXTRAM=0, all “MOVX” instructions are directed to the on-chip expanded XRAM. Note2: For the control bit EXTRAM=1, all “MOVX” instructions are directed to the external data memory. Note3: The cycle time for access of external data memory is (ALE_Stretched_Clocks) + (RW_Stretched_Clocks) 125 Description MPC82G516A Data Sheet Execution Byte Clock Cycles ...
Page 126
... AND complement of direct bit to Carry ANL C,/bit OR direct bit to Carry ORL C,bit OR complement of direct bit to Carry ORL C,/bit Move direct bit to Carry MOV C,bit Move Carry to direct bit MOV bit,C MEGAWIN Description MPC82G516A Data Sheet Execution Byte Clock Cycles ...
Page 127
... Compare immediate data to indirect RAM and jump if not CJNE @Ri,#data,rel Decrement register and jump if not equal DJNZ Rn,rel Decrement direct byte and jump if not equal DJNZ direct,rel No operation NOP 127 Description l MPC82G516A Data Sheet Execution Byte Clock Cycles ...
Page 128
... Application Notes 27.1 Power Supply for 3.3V, 5V and Wide-Range Systems The MPC82G516A consists of 5V logic device and 3V logic device; the former is directly powered from VDD pin while the latter is powered through the internal Low Drop-Out (LDO) voltage regulator. V30 pin comes from the LDO’ ...
Page 129
... Power Supply for Wide-Range System To have the MPC82G516A work system with power supply varying from 2.7V to 5.5V, pin V30 be tied to VDD and an external ripple-filtering capacitor is necessary, as shown in Figure 27-3. not Figure 27-3. Power Supplied Wide-Range System MPC82G516A VSS 27.2 Reset Circuit Normally, the power-on reset can be successfully generated during power-up. However, to further ensure the MCU a reliable reset during power-up, the external reset is necessary ...
Page 130
... To achieve successful and exact oscillating (up to 24MHz), the capacitors C1 and C2 are necessary regardless of state of the hardware option OSCDN (enabled or disabled). Normally, C1 and C2 have the same value of about 20pF~150pF. Figure 27-5. XTAL Oscillating Circuit Crystal Osc MEGAWIN MPC82G516A XTAL2 XTAL1 MPC82G516A Data Sheet 130 ...
Page 131
... On-Chip Debug Function The MPC82G516A is equipped with a proprietary On-Chip Debug (OCD) interface for In-Circuit Emulator (ICE). The OCD interface provides on-chip and in-system non-intrusive debugging without any target resource occupied. Several operations necessary for an ICE are supported, such as Reset, Run, Stop, Step, Run to Cursor and Breakpoint Setting. Using the OCD technology, Megawin provides the “ ...
Page 132
... Parameters are valid over operating temperature range unless otherwise specified. 4. Tested by sampling. 5. Under steady state (non-transient) conditions Based on package heat transfer limitations, not device power consumption. MEGAWIN *Note4 *Note5 /I must be externally limited MPC82G516A Data Sheet Rating Unit -40 ~ +85 ℃ -55 ~ +125 ℃ -0.5 ~ +6.5 V -0.5 ~ VDD+0.5 V ...
Page 133
... =3.6V and =2.4V and =3.6V and =2.4V and =3.6V and =2.4V and =3.6V and =2.4V and =3.6V and MPC82G516A Data Sheet 1 Min Typ* Max =0. -10 =0. =1. -120 0. +0.5 0.5 0.25V +0 ...
Page 134
... F =24MHz osc V =3. =6MHz osc F =12MHz osc F =24MHz osc F =24MHz, osc V =2.4V~3. approximately 1.5V. IN for steady state (non-transient) limits on I will be lower than the listed specification. OH will be higher than the listed specification. OL MPC82G516A Data Sheet 1 Min Typ* Max Unit 2.4 2.1 - 3.6 1.8 2.4 V 2.1 - 3.6 1.8 2.4 2.3 - 3.6 2.3 2 1.8 4.0 5 ...
Page 135
... OH V =5.5V and =2.7V and =5.5V and =2.7V and =5.5V and =2.7V and =5.5V and =2.7V and =5.5V and MPC82G516A Data Sheet 1 Min Typ* Max =0. -30 =0. =2. -260 0.25V +0.7 0.5 0.25V +0.5 0.5 0. ...
Page 136
... F =24MHz osc V =5. =6MHz osc F =12MHz osc F =24MHz osc F =24MHz, osc =2.7V~5. approximately 2.0V. IN for steady state (non-transient) limits on I will be lower than the listed specification. OH will be higher than the listed specification. OL MPC82G516A Data Sheet 1 Min Typ* Max Unit 2.4 2.1 - 5.5 1.8 2.4 V 2.2 - 5.5 1.9 2.4 2.4 - 5.5 2.4 2 1.8 4.7 6 ...
Page 137
... Plastic Dual In-line Package; 40 leads (600 mil) Plastic Leaded Chip Carrier; 44 leads Plastic Quad Flat Package; 44 leads; body 10x10x2.0 mm Plastic Low-profile Quad Flat Package; 48 leads; body 7x7x1.4 mm Shrink Small Outline Package; 28 leads; body 10.2x5.3x1.75 mm MPC82G516A Data Sheet Packing Tube Tube Tray Tray Tube MEGAWIN ...
Page 138
... Package Outline 40-Pin PDIP Package MPC82G516A Data Sheet MEGAWIN 138 ...
Page 139
... PLCC Package 139 MPC82G516A Data Sheet MEGAWIN ...
Page 140
... PQFP Package MPC82G516A Data Sheet MEGAWIN 140 ...
Page 141
... LQFP Package 141 MPC82G516A Data Sheet MEGAWIN ...
Page 142
... SSOP Package MPC82G516A Data Sheet MEGAWIN 142 ...
Page 143
... Megawin reserves the right to make changes in the products - including circuits, standard cells, and/or software - described or contained herein in order to improve design and/or performance. When the product is in mass production, relevant changes will be communicated via an Engineering Change Notification (ECN). 143 MPC82G516A Data Sheet MEGAWIN ...
Page 144
... Revision History Revision A1 Initial issue. A2 Modify some specifications. A3 Rewrite the datasheet to enrich the contents. MEGAWIN Description MPC82G516A Data Sheet Date 2007/7 2008/3 2008/6 144 ...