mpc82g516a Megawin Technology, mpc82g516a Datasheet - Page 86

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mpc82g516a

Manufacturer Part Number
mpc82g516a
Description
8-bit Microcontroller
Manufacturer
Megawin Technology
Datasheet

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18 Watchdog Timer
Watchdog Timer (WDT) is intended as a recovery method in situations (such as power noise/glitches and
electrostatic discharge) where the CPU may be subjected to software upset. When software upset happens, the
WDT will protects the system from incorrect code execution by causing a system reset. The WDT consists of a
15-bit free-running counter, an 8-bit prescaler and a control register (WDTCR). Figure 18-1 shows the WDT block
diagram.
Figure 18-1. WDT Block Diagram
18.1 WDT Control Register
WDTCR (Address=E1H, Watch-Dog-Timer Control Register, Power-on Reset Value=0x00,0000B)
WRF: WDT reset flag. When WDT overflows, this bit is set by H/W. It should be cleared by software.
ENW: WDT enable bit. Set to enable WDT.
CLRW: WDT clear bit. Writing “1” to this bit will clear the 15-bit WDT counter to 0000H. Note this bit has no need
to be cleared by writing “0”.
WIDL: WDT in Idle mode. Set this bit to let WDT keep counting while the MCU is in the Idle mode.
PS2~PS0: Prescaler select bits.
MEGAWIN
PS2 PS1 PS0
WRF
0
0
0
0
1
1
1
1
7
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
6
-
Prescaler value
ENW
5
128
256
16
32
64
2
4
8
CLRW
4
MPC82G516A Data Sheet
(Note: Once set, this bit can only be cleared by power-on reset.)
WIDL
3
PS2
2
PS1
1
PS0
0
86

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