mpc8314e Freescale Semiconductor, Inc, mpc8314e Datasheet - Page 90

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mpc8314e

Manufacturer Part Number
mpc8314e
Description
Powerquicc Ii Pro Processor Hardware Specifications
Manufacturer
Freescale Semiconductor, Inc
Datasheet

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Package and Pin Listings
XPADVSS
Notes:
1. This pin is an open drain signal. A weak pull-up resistor (1 kΩ) should be placed on this pin to NVDD.
2. This pin is an open drain signal. A weak pull-up resistor (2–10 kΩ) should be placed on this pin to NVDD.
3. This output is actively driven during reset rather than being three-stated during reset.
4. These JTAG pins have weak internal pull-up P-FETs that are always enabled.
5. This pin should have a weak pull up if the chip is in PCI host mode. Follow PCI specifications recommendation.
6. This pin must always be tied to VSS.
7. Thermal sensitive resistor.
8. This pin should be
9. The LB_POR_CFG_BOOT_ECC functionality for this pin is only available in MPC8314E revision 1.1. The
90
LB_POR_CFG_BOOT_ECC is sampled only during the PORESET negation. This pin with an internal pull down resistor
enables the ECC by default. To disable the ECC an external strong pull up resistor or a tri-state buffer is needed.
connecte
MPC8314E PowerQUICC
Signal
Table 66. MPC8314E TEPBGA II Pinout Listing (continued)
d to USB_VSSA_BIAS through 10K precision resistor.
II Pro Processor Hardware Specifications, Rev. 0
Package Pin Number
P5, P9, V3
Pin Type
I
Freescale Semiconductor
Supply
Power
Notes

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