mpc5644a Freescale Semiconductor, Inc, mpc5644a Datasheet - Page 22

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mpc5644a

Manufacturer Part Number
mpc5644a
Description
Mpc5644a Microcontroller Data Sheet
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Overview
1.3.2
Table 2
22
e200z4 core
Flash memory
Static random-access memory (SRAM)
Calibration Bus interface
Cyclic redundancy check (CRC)
Enhanced direct memory access (eDMA)
Deserial serial peripheral interface (DSPI)
Enhanced modular input-output system
(eMIOS)
Enhanced queued analog-to-digital
converter (eQADC)
Enhanced serial communication interface
(eSCI)
Enhanced time processor unit (eTPU2)
External bus interface (EBI)
Controller area network (FlexCAN)
FlexRay
Interrupt controller (INTC)
JTAG controller
Memory protection unit (MPU)
Nexus port controller (NPC)
System timers
Crossbar switch (XBAR)
Boot assist module (BAM)
Temperature sensor
summarizes the functions of the blocks present on the MPC5644A series microcontrollers.
Block summary
Block
Preliminary—Subject to Change Without Notice
Table 2. MPC5644A series block summary
MPC5644A Microcontroller Data Sheet, Rev. 4
Executes programs and interrupt handlers.
Provides storage for program code, constants, and variables.
to the calibration system connector.
CRC checksum generator.
core.
external devices.
Provides the functionality to generate or measure events.
Provides accurate and fast conversions for a wide range of
applications.
Provides asynchronous serial communication capability with
peripheral devices and other microcontroller units.
Second-generation co-processor processes real-time input events,
performs output waveform generation, and accesses shared data
without host intervention.
Enables expansion of internal bus to enable connection of external
memory or peripherals.
Supports the standard CAN communications protocol.
Provides high-speed distributed control for advanced automotive
applications.
Provides priority-based preemptive scheduling of interrupt requests.
Provides the means to test chip functionality and connectivity while
remaining transparent to system logic when not in test mode.
Provides hardware access control for all memory references
generated.
Provides real-time development support capabilities in compliance
with the IEEE-ISTO 5001-2003 standard.
compare timer and system watchdog timer.
Internal busmaster.
for user-supplied boot code and, if none is found, executes the BAM
boot code resident in device ROM.
Provides the temperature of the device as an analog value.
Provides storage for program code, constants, and variables.
Transfers data across the crossbar switch to/from peripherals attached
Performs complex data movements with minimal intervention from the
Provides a synchronous serial interface for communication with
Includes periodic interrupt timer with real-time interrupt; output
Block of read-only memory containing executable code that searches
Function
Freescale Semiconductor

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