mpc5534mzq66 Freescale Semiconductor, Inc, mpc5534mzq66 Datasheet - Page 44

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mpc5534mzq66

Manufacturer Part Number
mpc5534mzq66
Description
Mpc5534 High Performance Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Electrical Characteristics
3.13.9
1
2
3
44
CLOAD = 25pF on all outputs. Pad drive strength set to maximum.
Num
SS timing specified at F
= TL to TH, and CL = 50pF with SRC = 0b11.
Maximum operating frequency is highly dependent on track delays, master pad delays, and slave pad delays.
FCK duty is not 50% when it is generated through the division of the system clock by an odd number.
1
2
3
4
5
6
7
8
External Device Data Sample at
FCK Frequency
FCK Period (t
Clock (FCK) High Time
Clock (FCK) Low Time
SDS Lead/Lag Time
SDO Lead/Lag Time
EQADC Data Setup Time (Inputs)
EQADC Data Hold Time (Inputs)
EQADC Data Sample at
eQADC SSI Timing
FCK Falling Edge
FCK Rising Edge
FCK
Table 27. EQADC SSI Timing Characteristics (pads at 3.3V or at 5.0V)
2, 3
= 1/ f
Rating
SYS
FCK
= 80MHz, VDD = 1.35V to 1.65V, VDDEH = 3.0V to 5.5V, VDD33 and VDDSYN = 3.0V to 3.6V, T
SDO
SDS
FCK
SDI
)
Preliminary—Subject to Change Without Notice
MPC5534 Microcontroller Data Sheet, Rev. 0
Figure 27. EQADC SSI Timing
Symbol
t
t
5
t
6
t
t
t
SDS_LL
SDO_LL
EQ_HO
FCKHT
EQ
FCKLT
f
t
FCK
FCK
3
_
SU
2
1st (MSB)
4
t
t
SYS_CLK
SYS_CLK
7
1st (MSB) 2nd
1/17
–7.5
–7.5
Min
22
2
1
8
− 6.5
− 6.5
2nd
Typ
25th
25th
26th
9* t
8* t
SYS_CLK
SYS_CLK
Freescale Semiconductor
Max
+7.5
+7.5
1/2
4
5
17
1
26th
+ 6.5
+ 6.5
f
t
SYS_CLK
SYS_CLK
Unit
ns
ns
ns
ns
ns
ns
A

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