mpc2002sg66 Freescale Semiconductor, Inc, mpc2002sg66 Datasheet - Page 6

• Manufacturer Part Number: mpc2002sg66
• Description: 256kb And 512kb Burstram Secondary Cache Module For Powerpc
• Manufacturer: Freescale Semiconductor, Inc

MPC2002 MPC2003
6
SYNCHRONOUS TRUTH TABLE
NOTES:
ASYNCHRONOUS TRUTH TABLE
NOTES:
ABSOLUTE MAXIMUM RATINGS
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
Power Supply Voltage
Voltage Relative to V SS for Any
Pin Except V CC
Output Current (per I/O)
Power Dissipation
Temperature Under Bias
Operating Temperature
Storage Temperature
1. X means Don’t Care.
2. All inputs except G must meet setup and hold times for the low–to–high transition of clock (K).
3. Wait states are inserted by suspending burst.
1. X means Don’t Care.
2. For a write operation following a read operation, G must be high before the input data
H
H
E
L
L
L
X
X
X
X
required setup time and held high through the input data hold time.
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
Deselected
Operation
Read
Write
TSP
H
H
H
H
H
H
L
X
L
Rating
TSC
H
H
H
H
X
X
L
L
L
BAA
(See Notes 1, 2, and 3)
X
X
X
X
X
H
H
G
L
L
L
X
X
(Voltages Referenced to V SS = 0 V)
(See Notes 1 and 2)
LW or UW
V in , V out
Symbol
T bias
V CC
T stg
I out
P D
T A
X
X
X
H
H
H
L
L
L
Data Out (DQ0 – DQ8)
High–Z — Data In
– 0.5 to V CC + 0.5
I/O Status
– 0.5 to + 7.0
– 55 to + 125
High–Z
– 10 to + 85
L–H
L–H
L–H
L–H
L–H
L–H
L–H
L–H
L–H
0 to +70
K
Value
6.0
30
External Address
External Address
External Address
Current Address
Current Address
Next Address
Next Address
Address
Unit
mA
W
V
V
C
C
C
N/A
N/A
inputs against damage due to high static volt-
ages or electric fields; however, it is advised
that normal precautions be taken to avoid
application of any voltage higher than maxi-
mum rated voltages to this high–impedance
circuit.
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established.
the output devices are in High–Z at power up.
This device contains circuitry to protect the
This BiCMOS memory circuit has been
This device contains circuitry that will ensure
Write Cycle, Continue Burst
Read Cycle, Continue Burst
Write Cycle, Suspend Burst
Read Cycle, Suspend Burst
Read Cycle, Begin Burst
Write Cycle, Begin Burst
Read Cycle, Begin Burst
MOTOROLA FAST SRAM
Deselected
Deselected
Operation