s1r72801 Epson Electronics America, Inc., s1r72801 Datasheet - Page 49

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s1r72801

Manufacturer Part Number
s1r72801
Description
Ieee1394 Controller S1r72801f00a
Manufacturer
Epson Electronics America, Inc.
Datasheet
LINK Core Interrupt Status Register 1
Bit7 Reserved
Bit6 Reserved
Bit5 Reserved
Bit4 Reserved
Bit3 RxOnTardy
Bit2 Receive Packet Header CRC Error
Bit1 Receive Packet Tcode Unknown
Bit0 transmit Retry Exceeded
Address Register Name
0x04
The value of each bit of this register indicates the status of a corresponding interrupt source. If these bits become
“1” when the associated bit of the LINKIntEnb1 Register is “1”, this register asserts the interrupt signal to the
CPU.
The CPU reads this register after receiving the interrupt signal to locate an interrupt source. By writing the read
value again, it clears these bits.
When a packet is received when the ChipCtl. SendTardy bit is “1”, an Ack_tardy is returned to the party of the
other end and this bit becomes “1”.
When an error exists in the header CRC of a received packet, this bit becomes “1”.
When the Tcode in a received packet is invalid, this bit becomes “1”.
If a transmit retry fails since the set value of the MaxRetry Register is exceeded when the RetryLimit Register
is not zero or the MaxRetry Register is not 0 and this bit becomes “1”.
LinkIntStat1
7:
6:
5:
4:
3: RxOnTardy
2: RxHcrcErr
1: RxUnkTcode
0: TxRtyExced
Bit Symbol
R(W) 0: None
R(W) 0: None
R(W) 0: None
R(W) 0: None
R/W
EPSON
0:
0:
0:
0:
1:
1:
1:
1:
1: Ack_tardy Sent
1: Rx Packet Header CRC Err
1: Rx Packet Tcode Unknown
1: Tx Retry Exceeded
Description
H.Rst S.Rst B.Rst
S1R72801F00A
0x00 0x00
45

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