s1r72801 Epson Electronics America, Inc., s1r72801 Datasheet - Page 6

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s1r72801

Manufacturer Part Number
s1r72801
Description
Ieee1394 Controller S1r72801f00a
Manufacturer
Epson Electronics America, Inc.
Datasheet
S1R72801F00A
2
Built-in CPU
Integration of a CPU eliminated the necessity of an
external CPU to control this IC.
CPU core:
High speed/high performance:
Command set: 16-bit fixed length, 105 types of basic
Execution cycle:
AND/OR (MAC) operation:
CPU Register: 16 32-bit general registers and 5 32-
Memory space:Linear space where 256-Mbyte (28-
External bus interface:
Reset, boot:
Built-in RAM: 8Kbytes
Harvard architecture (Concurrency
of a fetch and load/store)
Ready for operation with 50MHz
commands
Execution at one cycle/command
regarding a main command
16 bits
MAC (25 MOPS at 50MHz)
bit special registers
bit) code, data, and I/O can be
mapped.
Directly connects the external
memory of the memory area.
Programmable wait cycle (7 cycles,
Max.)
Enables handshake through the
XWAIT terminal.
Interrupt: Ready for reset, NMI, max.
128 external interrupts, 4 software
interrupts, and 2 exceptions
Cold reset, hot reset
32-bit RISC CPU S1C33000
16 bits + 64 bits, 2 clocks/
EPSON
The CPU core built into this IC is an original 32-bit
RISC CPU from SEIKO EPSON. Regarding the CPU
core, refer to the E0C33208/204/202 TECHNICAL
MANUAL. The built-in RAM is 8Kbytes.
Note: In the built-in CPU core, a DMA controller and
• Memory structure:
• Sector size:
• Unit of erase: Per chip or sector
• Unit of write: Writing with words
• Erase/write time:
• Access time:
• Reliability:
Flash ROM
Integration of a Flash ROM eliminated the necessity
of a ROM to externally store programs.
Others
A Boot ROM (4MBbytes, Max.) is connectable to
outside of this IC.
Supply voltage, 5.0V
184PinQFP (0.4mm pitch)
Not radiation resistant.
A/D converter are not integrated; this part is
different from the description on the DMA
controller and A/D converter given in
TECHNICAL MANUAL (and Macro Manual).
A low speed oscillation circuit (OSC1) is not
available.
No. of erase/write 1,000 times
Memory size 512K (32K
512 words/sector
Chip erase time 100ms (Standard)
Sector erase time 20ms (Standard)
Write time:
90nsec. (Max.)
Data retention: 10 years
10% and 3.3V
15 s (Standard)
0.3V
16) bits

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