lan9218 Standard Microsystems Corp., lan9218 Datasheet - Page 120

• Manufacturer Part Number: lan9218
• Description: Lan9218 High-performance Single-chip 10/100 Ethernet Controller With Hp Auto-mdix Support
• Manufacturer: Standard Microsystems Corp.

Revision 2.3 (08-06-08)
6.6
SYMBOL
t
cycle
t
t
t
t
t
t
asu
dsu
csh
csl
ah
dh
nCS, nWR
Data Bus
A[7:1]
PIO writes are used for all LAN9218 write cycles. PIO writes can be performed using Chip Select (nCS)
or Write Enable (nWR). Either or both of these control signals must go high between cycles for the
period specified.
PIO Writes are valid for 16- and 32-bit access. Timing for 16-bit and 32-bit PIO write cycles are
identical with the exception that D[31:16] are ignored during a 16-bit write.
Note: The “Data Bus” width is 32 bits with optional support for 16-bit bus widths.
Note: A PIO Write cycle begins when both nCS and nWR are asserted. The cycle ends when either
PIO Writes
DESCRIPTION
Write Cycle Time
nCS, nWR Deassertion Time
Address Setup to nCS, nWR Assertion
Address Hold Time
Data Setup to nCS, nWR Deassertion
Data Hold Time
nCS, nWR Assertion Time
or both nCS and nWR are deasserted. They may be asserted and deasserted in any order.
Figure 6.5 PIO Write Cycle Timing
Table 6.7 PIO Write Cycle Timing
DATASHEET
120
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX Support
MIN
45
32
13
0
0
7
0
TYP
MAX
SMSC LAN9218
Datasheet
UNITS
ns
ns
ns
ns
ns
ns
ns