lan9218i Standard Microsystems Corp., lan9218i Datasheet - Page 32
lan9218i
Manufacturer Part Number
lan9218i
Description
Lan9218i High-performance Single-chip 10/100 Ethernet Controller With Hp Auto-mdix And Industrial Temperature Support
Manufacturer
Standard Microsystems Corp.
Datasheet
1.LAN9218I.pdf
(132 pages)
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Revision 2.3 (08-06-08)
3.8.2.1
The host can disable the EEPROM interface through the GPIO_CFG register. When the interface is
disabled, the EEDIO and ECLK signals can be used as general-purpose outputs, or they may be used
to monitor internal MII signals.
Supported EEPROM Operations
The EEPROM controller supports the following EEPROM operations under host control via the
E2P_CMD register. The operations are commonly supported by “93C46” EEPROM devices. A
description and functional timing diagram is provided below for each operation. Please refer to the
E2P_CMD register description in
page 90
for E2P_CMD field settings for each command.
Busy Bit = 0
EEPROM Write
Figure 3.2 EEPROM Access Flow Diagram
Write Data
Command
Command
Register
Register
Register
Write
Read
Idle
High-Performance Single-Chip 10/100 Ethernet Controller with HP Auto-MDIX and Industrial Temperature Support
DATASHEET
Section 5.3.23, "E2P_CMD – EEPROM Command Register," on
32
EEPROM Read
Read Data
Command
Command
Register
Register
Register
Write
Read
Idle
Busy Bit = 0
SMSC LAN9218i
Datasheet
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