peb20534 Infineon Technologies Corporation, peb20534 Datasheet - Page 84
peb20534
Manufacturer Part Number
peb20534
Description
Dma Supported Serial Communication Controller With 4 Channels
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB20534.pdf
(439 pages)
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• Interrupt queue polling:
The two solutions can be mixed. Queues with high interrupt activity might be serviced by
periodic queue polling and other queues on INTA and GSTAR indication only. In this
case the ISR only takes care on some GSTAR bits but must confirm all indications to
reset INTA indication.
Note that any interrupt event will cause an INTA and GSTAR indication.
To distinguish between old and new interrupt vectors in the circular queues, vectors can
be overwritten by software with all zeros. Because the number of new vectors is not
known, a queue read pointer can be incremented as long as no new vector is found at
this location.
Data Sheet
queue specific bit positions in register GSTAR and all new vectors are read from the
corresponding interrupt queues afterwards. It is possible to confirm all indications by
one register access writing the value 0xFFFFFFFF
The interrupt queues are polled periodically for new vectors. Neither INTA signal nor
register GSTAR is evaluated.
84
DMA Controller and Central FIFOs
H
to GSTAR.
PEB 20534
PEF 20534
2000-05-30
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