com20020-5 Standard Microsystems Corp., com20020-5 Datasheet - Page 46
com20020-5
Manufacturer Part Number
com20020-5
Description
Com20020-5 Ulanc Universal Local Area Network Controller With 2k X 8 On-board Ram
Manufacturer
Standard Microsystems Corp.
Datasheet
1.COM20020-5.pdf
(58 pages)
- Current page: 46 of 58
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FIGURE 11 - MULTIPLEXED BUS, 68XX-LIKE CONTROL SIGNALS; WRITE CYCLE
AD0-AD2,
D3-D7
nCS
ALE
DIR
nDS
*
Note 1:
**
T is the Arbitration Clock Period.
T is identical to XTAL1 if SLOW ARB = 0,
T is twice XTAL1 period if SLOW ARB = 1
Note 2:
t10
t1
t2
t3
t4
t5
t6
t7
t8
t9
Address Setup to ALE Low
The Microcontroller typically accesses the COM20020-5 on every other cycle.
Therefore, the cycle time specified in the microcontroller's datasheet
should be doubled when considering back-to-back COM20020-5 cycles.
Any cycle occurring after a write to Address Pointer Low Register requires a
minimum of 4T from the trailing edge of nDS to the leading edge of the
next nDS.
Address Hold from ALE Low
nCS Setup to ALE Low
nCS Hold from ALE Low
ALE Low to nDS Low
Valid Data Setup to nDS High
Data Hold from nDS High
Cycle Time (nDS Low to Next Time Low)**
DIR Setup to nDS Active
DIR Hold from nDS Inactive
t1
t3
VALID
Parameter
t2,
t4
t5
t9
46
VALID DATA
t6
min
10
10
4T*
30
10
30
10
10
20
15
t8
max
t7
t10
Note 2
units
nS
nS
nS
nS
nS
nS
nS
nS
nS
nS
t8**
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