m66271fp Renesas Electronics Corporation., m66271fp Datasheet - Page 7

• Manufacturer Part Number: m66271fp
• Description: Operation Panel Controller
• Manufacturer: Renesas Electronics Corporation.

M66271FP
(2) Accessing to VRAM
MCS pulse width
WR pulse width
Data set up time before falling edge of MCS
Data set up time before falling edge of WR
Data hold time after rising edge of MCS
Data hold time after rising edge of WR
Address set up time before falling edge of MCS
Address set up time before falling edge of WR
Address set up time before falling edge of RD
Address hold time after rising edge of MCS
Address hold time after rising edge of WR
Address hold time after rising edge of RD
(3) Clock and Accessing to LCD Display
MPUCLK cycle time
MPUCLK "H" pulse width
MPUCLK "L" pulse width
OSC cycle time
OSC "H'' pulse width
OSC "L" pulse width
CP cycle time
CP "H" pulse width
CP "L" pulse width
FLM pulse width
Note:
Test Circuit
REJ03F0267-0200 Rev.2.00 Mar 18, 2008
Page 7 of 27
P.G
Clock frequency of OSC1 input is less than fmax = 20 MHz.
Limit of OSC clock for the internal operation is fmax = 10 MHz.
When OSC1 is more than 10 MHz from external input, set OSC clock up to 10 MHz by using division of OSCC
register.
Division is set with rising edge of OSC1 input.
1/n = Division of OSC1
LPW = Setting value of LPW register
Input
50
Item
Item
DUT
V
DD
V
SS
t
t
t
t
t
t
t
t
t
t
C (CLK)
WH (CLK)
WL (CLK)
C (OSC)
WH (OSC)
WL (OSC)
C (CP)
WH (CP)
WL (CP)
W (FLM)
C
C
L
L
Symbol
t
t
t
t
t
t
t
t
t
t
t
t
W (MCS)
W (WR)
su (D-MCS)
su (D-WR)
h (MCS-D)
h (WR-D)
su (A-MCS)
su (A-WR)
su (A-RD)
h (MCS-A)
h (WR-A)
h (RD-A)
V
DD
R
SW1
R
SW2
Symbol
L
L
= 1 k
= 1 k
Outputs
except for
D <15:0>
D <15:0>
Min
50*
50
—
—
—
—
—
(1) Input pulse level: 0 to 3 V
(2) Load capacity C
t
t
t
t
dis (LZ)
dis (HZ)
a (ZL)
a (ZH)
Input pulse rise/fall time: tr, tf = 3 ns
Input decision voltage: 1.5 V
Output decision voltage: V
(However, t
(HZ)
connection and input capacity of probe.
Min
70
15
15
15
Item
0
is 90% of that for decision.)
2 • t
C (OSC)
2 • (1/n)
t
t
t
t
C (OSC)
C (OSC)
C (OSC)
C (CLK)
(1/n)
(1/n)
Typ
dis (LZ)
—
—
2
2
Typ
—
—
—
—
—
• LPW
L
is 10% of output amplitude and t
include float capacity of
Closed
Closed
Open
Open
SW1
DD
Max
—
—
—
—
—
/2
Max
—
—
—
—
—
—
—
Closed
Closed
Open
Open
SW2
Unit
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
dis