at89c51cc03c-slsim ATMEL Corporation, at89c51cc03c-slsim Datasheet - Page 20

• Manufacturer Part Number: at89c51cc03c-slsim
• Description: At89c51cc03 Enhanced 8-bit Mcu With Can Controller And Flash Memory
• Manufacturer: ATMEL Corporation

Registers
20
AT89C51CC03
Table 2. CKCON0 Register
CKCON0 (S:8Fh)
Clock Control Register
Note:
Reset Value = 0000 0000b
Number
CANX2
Bit
7
7
6
5
4
3
2
1
0
1. This control bit is validated when the CPU clock bit X2 is set; when X2 is low, this bit
has no effect.
Mnemonic Description
WDX2
CANX2
PCAX2
WDX2
T2X2
T1X2
T0X2
SIX2
Bit
X2
6
CAN clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
WatchDog clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Programmable Counter Array clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Enhanced UART clock (MODE 0 and 2)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer2 clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer1 clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
Timer0 clock
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle.
CPU clock
Clear to select 12 clock periods per machine cycle (STD mode) for CPU and all
the peripherals.
Set to select 6 clock periods per machine cycle (X2 mode) and to enable the
individual peripherals "X2"bits.
PCAX2
5
(1)
(1)
(1)
(1)
SIX2
(1)
4
T2X2
3
(1)
(1)
T1X2
2
4182N–CAN–03/08
T0X2
1
X2
0