at89c51cc03c-slsim ATMEL Corporation, at89c51cc03c-slsim Datasheet - Page 46
at89c51cc03c-slsim
Manufacturer Part Number
at89c51cc03c-slsim
Description
At89c51cc03 Enhanced 8-bit Mcu With Can Controller And Flash Memory
Manufacturer
ATMEL Corporation
Datasheet
1.AT89C51CC03C-SLSIM.pdf
(197 pages)
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Overview of FM0
Operations
Flash Registers (SFR)
FCON Register
46
AT89C51CC03
The CPU interfaces to the flash memory through the FCON register, AUXR1 register
and FSTA register.
These registers are used to map the column latches, HSB, extra row and EEDATA in
the working data or code space.
Table 13. FCON Register
FCON Register (S:D1h)
Flash Control Register
Reset Value= 0000 0000b
Number
FPL3
Bit
7-4
2-1
7
3
0
Mnemonic Description
FMOD1:0
FBUSY
FPL3:0
FPL2
FPS
Bit
6
Programming Launch Command Bits
Write 5Xh followed by AXh to launch the programming according to FMOD1:0.
(see Table 16.)
Flash Map Program Space
When this bit is set:
The MOVX @DPTR, A instruction writes in the columns latches space
When this bit is cleared:
The MOVX @DPTR, A instruction writes in the regular XDATA memory space
Flash Mode
See Table 16.
Flash Busy
Set by hardware when programming is in progress.
Clear by hardware when programming is done.
Can not be changed by software.
FPL1
5
FPL0
4
FPS
3
FMOD1
2
4182N–CAN–03/08
FMOD0
1
FBUSY
0
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