sx1511iultrt Semtech Corporation, sx1511iultrt Datasheet - Page 14

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sx1511iultrt

Manufacturer Part Number
sx1511iultrt
Description
World
Manufacturer
Semtech Corporation
Datasheet
ADVANCED COMMUNICATIONS & SENSING
4.3
4.4
4.4.1
The SX1510, SX1511 and SX1512 generate their own power on reset signal after a power supply is connected
to the VDDM pin. The reset signal is made available for the user at the pin NRESET. The rising edge of the
NRESET indicates that the startup sequence of the SX1510, SX1511 or SX1512 has finished. NRESET must be
connected to VDDM (or greater) either directly, or via a resistor.
Rev 1 – 24
1. Device behavior is undefined until VDDM rises above VPOR, at which point NRESET is driven to GND
2. After t
SX1512 16-channel SPI GPIO with LED Driver and Keypad Engine
Reset
by the SX1510, SX1511 or SX1512.
Hardware (NRESET)
pulled high by an external resistor.
th
NRESET
Feb. 2010
VDDM
RESET
NRESET
VDROPH
VDROPL
VDDM
Figure 6 – 16-channel Low Voltage GPIO with LED Driver and Keypad Engine
VPOR
NSS
SCK
Undefined
, NRESET is released (high-impedance) by the SX1510, SX1511 or SX1512 to allow it to be
SO
SI
1
Sleep/Wakeup
t
RESET
64 Keys Max
Figure 7 – Power-On / Brown-out Reset Conditions
Keypad
Engine
Reset
Auto
2
3
t
PULSE
SX1512
Clock Mgmt
SPI Bus
Control
Oscillator
External
4
OSCIO
Internal
GND
Clock
14
5
8-Bit
R/W
8-Bit
R/W
Undefined
World’s Lowest Voltage Level Shifting GPIO
Intensity (PWM)
LED Driver
Breath (Ramp)
I/O Bank A
A
I/O Bank B
A
Blink (Timer)
Interrupt
with LED Driver and Keypad Engine
6
Undefined
SX1510/SX1511/SX1512
1
t
RESET
VCC1
I/O[0]
I/O[1]
VCC2
NINT
I/O[2]
I/O[3]
I/O[4]
I/O[5]
I/O[6]
I/O[7]
I/O[8]
I/O[9]
I/O[10]
I/O[11]
I/O[12]
I/O[13]
I/O[14]
I/O[15]
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