qt114 Quantum Research Group, qt114 Datasheet - Page 9

• Manufacturer Part Number: qt114
• Description: Qlevel? Sensor Ic
• Manufacturer: Quantum Research Group

If the QT114 is connected to an external circuit via a long
cable, it is possible for ground-bounce to cause damage to
the OUT pins; even though the transients are led away from
the QT114 itself, the connected signal or power ground line
will act as an inductor, causing a high differential voltage to
build up on the OUT wires with respect to ground. If this is a
possibility, the OUT pins should have a resistance in series
with them on the sensor PCB to limit current; this resistor
should be as large as can be tolerated by the load.
3.5 SAMPLE CAPACITOR
Charge sampler Cs should be a stable grade of capacitor,
like PPS film, NPO ceramic, or polycarbonate. The
acceptable Cs range is anywhere from 10nF to 100nF
(0.1uF) and its required value will depend on load Cx. In
some cases, to achieve the 'right' value, two or more
capacitors may need to be wired in parallel.
The value of Cs controls the calibration point (Section 3.2)
and its selection should not be taken lightly.
3.6 POWER SUPPLY
The power supply can range from 2.5 to 5.0 volts. At 3 volts
current drain averages less than 20µA in most cases.
Operation can be from batteries, especially stable Lithium
cells, but be cautious about loads causing supply droop
(Section 3.3.1).
If the power supply is shared with another electronic system,
care should be taken to assure that the supply is free of
digital spikes, sags, and surges which can adversely affect
the QT114.
If desired, the supply can be regulated using a conventional
low current regulator, for example CMOS regulators that have
nanoamp quiescent currents. The voltage regulator should
not have a minimum load specification, which almost
certainly will be violated by the QT114's low current
requirement.
Since the QT114 operates in a burst mode, almost all the
power is consumed during the course of each burst. During
the time between bursts the sensor is quiescent.
3.6.1 M
Measuring average power consumption is a fairly difficult
task, due to the burst nature of the QT110's operation. Even
a good quality RMS DMM will have difficulty tracking the low
burst rate.
The simplest method for measuring average current is to
replace the power supply with a large value low-leakage
electrolytic capacitor, for example 2,700µF. 'Soak' the
capacitor by connecting it to a bench supply at the desired
operating voltage for 24 hours to form the electrolyte and
reduce leakage to a minimum. Connect the capacitor to the
QT114 circuit at T=0, making sure there will be no detections
during the measurement interval and no loads on the OUT
pins; at T=30 seconds measure the capacitor's voltage with a
DMM. Repeat the test without a load to measure the
capacitor's internal leakage, and subtract the internal leakage
result from the voltage droop measured during the QT114
load test. Be sure the DMM is connected only at the end of
each test, to prevent the DMM's own impedance from
contributing to the capacitor's discharge.
LQ
EASURING
S
UPPLY
C
URRENT
9
Supply drain can be calculated from the adjusted voltage
droop using the basic charge equation:
where C is the supply capacitor's value, t is the elapsed
measurement time in seconds, and DV is the adjusted
voltage droop on C.
3.7 PC BOARD LAYOUT
There are only a few important issues for the PCB layout. For
RF susceptibility reasons it should be compact, and if
possible use SMT components and a ground plane (Section
3.8). Lines for SNS1 and SNS2 should be short and not run
directly over the ground plane to reduce Cx loading, which
adversely affects sensitivity (Section 3.2). ESD issues should
be taken into account (Section 3.4). The board should not be
located in a place where there are wild temperature swings
which can cause excessive drift in Cs. The voltage regulator
should be located nearby and should only be shared with
other circuits that do not induce supply sags or spikes
(Section 3.6).
3.8 RFI / EMI ISSUES
3.8.1 S
The QT114 is remarkably resistant to RF fields. With enough
field strength at frequencies above 100MHz, internal
protection diode conduction at the SNS1 and SNS2 pins can
occur and destroy the charge-transfer process, causing false
detections or desensitization, or alternating cycles of both.
Susceptibility can be dramatically reduced by adding a
resistor in series with the Sense line, between 2K to 60K
ohms depending on load Cx. This has the effect of creating a
natural low-pass filter in conjunction with the Cs capacitor to
filter out external RF components. If an ESD network is used
(Figure 3-5), the added resistor should be placed between
the clamp diodes and the sense probe, and Re1 should be
made very small, 1K ohms or less, or even eliminated. With a
50pF load the added resistance should be no greater than
about 5.6K ohms, while at 10pF it can be as high as 27K; the
value should be chosen to allow at least 7 RC time constants
of settling with a 2µs charge time for efficient, stable
operation. 5% tolerance resistors can be used.
A great number of susceptibility problems can be traced to
RF fields coupling directly to components on the PCB.
Therefore a shielded, grounded housing is recommended to
reduce susceptibility. The use of SMT circuitry is also highly
recommended; physically reducing lead lengths of the wiring
traces and pins, along with a poured-copper ground plane,
will dramatically reduce the coupling of external RF fields.
3.8.2 RF E
RF emissions are extremely weak, as the charge-transfer
pulse frequency is only about 170kHz and the bursts are
sparsely spaced, so that the average spectral power density
is extremely low. The addition of a series resistor for EMI
reasons (above) will dramatically reduce edge rise and fall
times, resulting in an even greater reduction in emitted RF
energy.
USCEPTIBILITY
i
MISSIONS
✁VC
t
QT114 R1.04/1106