qt1060 Quantum Research Group, qt1060 Datasheet - Page 20

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qt1060

Manufacturer Part Number
qt1060
Description
Qtouch? 6-channel Sensor Ic
Manufacturer
Quantum Research Group
Datasheet
5.19
5.20
5.21
5.22
20
Address 29: User Output Buffer
Address 30: Detection Integrator
Address 31: PWM Level
Address 40 – 51: Key Signal
AT42QT1060
Table 5-19.
Table 5-20.
Table 5-21.
Table 5-22.
IO0 – 6 (User Output Buffer): these bits control the output level for the IO's that are configured
as outputs. A
inactive. See
Default: 0 (all IO's inactive)
DETECTION INTEGRATOR: this 8-bit value controls the number of consecutive measurements
that must be confirmed as having passed the key threshold before that key is registered as
being in detect. A value of zero should not be used.
Default: 3
PWM LEVEL: this 8-bit value controls the duty cycle of the PWM output signal. A value of 255
means the output is permanently active.
Default: 128 (50:50 duty cycle)
KEY SIGNAL: addresses 40 – 51 allow key signals to be read for each key, starting with key 0.
There are two bytes of data for each key. These are the key’s 16-bit key signals which are
accessed as two 8-bit bytes, stored LSB first. These addresses are read-only.
Address
Address
Address
Address
42 – 51
29
30
31
40
41
Reserved
Section 5.24 on page 21
User Output Buffer
Detection Integrator
PWM Level
Key Signal
1
MSB
MSB
b7
b7
b7
b7
means the output generates an active output, a 0 means that the output is
IO6
b6
b6
b6
b6
LSB/MSB OF KEY SIGNAL FOR KEYS 1 – 5
IO5
b5
b5
b5
b5
MSB OF KEY SIGNAL FOR KEY 0
LSB OF KEY SIGNAL FOR KEY 0
for I/O register precedence and example usage.
DETECTION INTEGRATOR
IO4
b4
b4
b4
b4
PWM LEVEL
IO3
b3
b3
b3
b3
IO2
b2
b2
b2
b2
IO1
b1
b1
b1
b1
9505D–AT42–12/08
LSB
LSB
IO0
b0
b0
b0
b0

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