lm25117psqx National Semiconductor Corporation, lm25117psqx Datasheet - Page 15

• Manufacturer Part Number: lm25117psqx
• Description: Wide Input Range Synchronous Buck Controller With Analog Current Monitor
• Manufacturer: National Semiconductor Corporation

R
phase characteristics to achieve a stable voltage loop gain.
This network creates a pole at DC (F
(F
recommended range of R
tion Information for detailed information.
The PWM comparator compares the emulated current sense
signal from Ramp Generator to the voltage at the COMP pin
through a 1.2V internal voltage drop and terminates the
present cycle when the emulated current sense signal is
greater than V
Diode Emulation
A fully synchronous buck regulator implemented with a free-
wheeling NMOS rather than a diode has the capability to sink
current from the output in certain conditions such as light load,
over-voltage or pre-bias startup. The LM25117 provides a
diode emulation feature that can be enabled to prevent re-
verse current flow in the low-side NMOS device. When con-
figured for diode emulation, the low-side NMOS driver is
disabled when SW pin voltage is greater than -5mV during the
off-time of the high-side NMOS driver, preventing reverse
current flow.
A benefit of the diode emulation is lower power loss at no load
or light load conditions. The negative effect of diode emulation
is degraded light load transient response.
The diode emulation feature is configured with the DEMB pin.
To enable diode emulation, connect the DEMB pin to GND or
leave the pin floating. If continuous conduction operation is
desired, the DEMB pin should be tied to a voltage greater than
3V and may be connected to VCC. The LM25117 forces the
regulator to operate in diode emulation mode when SS pin
voltage is less than the internal 0.8V reference, allowing for
startup into a pre-biased load with the continuous conduction
configuration.
COMP
Z
) for phase boost, and a high frequency pole (F
, C
COMP
COMP
and C
- 1.2V.
HF
configure the error amplifier gain and
COMP
is 2kΩ to 40kΩ. See Applica-
P1
), a mid-band zero
P2
). The
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15
Soft-Start
The soft-start feature allows the regulator to gradually reach
the steady state operating point, thus reducing startup stress-
es and surges. The LM25117 regulates the FB pin to the SS
pin voltage or the internal 0.8V reference, whichever is lower.
The internal 10µA soft-start current source gradually increas-
es the voltage on an external soft-start capacitor connected
to the SS pin. This results in a gradual rise of the output volt-
age. Soft-start time (t
equation:
The LM25117 can track the output of a master power supply
during soft-start by connecting a voltage divider from the out-
put of master power supply to the SS pin. At the beginning of
the soft-start sequence, V
25mV by the internal SS pull-down switch. During soft-start
period, when SS pin voltage is less than 0.8V, the LM25117
forces diode emulation for startup into a pre-biased load. If
the tracking feature is desired, connect the DEMB pin to GND
or leave the pin floating.
Cycle-by-Cycle Current Limit
The LM25117 contains a current limit monitoring scheme to
protect the regulator from possible over-current conditions as
shown in
the present cycle is terminated. For the case where the switch
current overshoots when the inductor is saturated or the out-
put is shorted to ground, the sample-and-hold circuit detects
the excess recirculating current before the high-side NMOS
driver is turned on again. The high-side NMOS driver is dis-
abled and will skip pulses until the current has decayed below
the current limit threshold. This approach prevents current
runaway conditions since the inductor current is forced to de-
cay to a controlled level following any current overshoot.
Maximum peak inductor current can be calculated as:
Where I
Figure
10, and is defined as:
PP
Figure
represents inductor peak to peak ripple current in
8. If the emulated ramp signal exceeds 1.2V,
ss
) can be calculated from the following
SS
should be allowed to go below
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