lm25117psqx National Semiconductor Corporation, lm25117psqx Datasheet - Page 16

• Manufacturer Part Number: lm25117psqx
• Description: Wide Input Range Synchronous Buck Controller With Analog Current Monitor
• Manufacturer: National Semiconductor Corporation

www.national.com
During an output short condition, the worst case peak inductor
current is limited to:
Where t
If the saturation current of the inductor is less than I
peak inductor current during output short condition may be
higher than I
and inductor should be checked under this condition.
Hiccup Mode Current Limiting
To further protect the regulator during prolonged current limit
conditions, LM25117 provides a hiccup mode current limit. An
internal hiccup mode fault timer counts the PWM clock cycles
during which cycle-by-cycle current limiting occurs. When the
hiccup mode fault timer detects 256 consecutive cycles of
current limiting, an internal restart timer forces the controller
to enter a low power dissipation standby mode and starts
sourcing 10μA current into the RES pin capacitor C
standby mode, HO and LO outputs are disabled and the soft-
start capacitor C
C
time (t
fore automatically restarting. When the RES pin voltage ex-
ceeds the 1.25V RES threshold, RES capacitor is discharged
and a soft-start sequence begins. t
the following equation:
RES
is connected from RES pin to AGND and determines the
RES
ON(MIN)
) in which the LM25117 remains in the standby be-
LIM_PK
FIGURE 10. Inductor Current
is the minimum HO on-time.
SS
. The temperatures of NMOS devices, Rs
is discharged.
RES
can be calculated from
FIGURE 13. RES Configurations
RES
LIM_PK
30155015
. In this
, the
(12)
(13)
16
The RES pin can also be configured for latch-off mode current
limiting or non-hiccup mode cycle-by-cycle current limiting. If
the RES pin is tied to VCC or a voltage greater than the RES
threshold at initial power-on, the restart timer is disabled and
the regulator operates with non-hiccup mode cycle-by-cycle
current limit. If the RES pin is tied to GND, the regulator enters
into the standby mode after 256 consecutive cycles of current
limiting and then never restarts until UVLO shutdown is cy-
cled. The restart timer is configured during initial power-on
when UVLO is above the UVLO threshold and VCC is above
the VCC UV threshold.
FIGURE 11. Hiccup Mode Current Limit Timing Diagram
FIGURE 12. Hiccup Mode Current Limit Circuit
30155020
30155018
30155019