ncn6804 ON Semiconductor, ncn6804 Datasheet - Page 13

• Manufacturer Part Number: ncn6804
• Description: Dual Smart Card Interface Ic With Spi Programming Interface
• Manufacturer: ON Semiconductor

Asynchronous Mode
address (by comparison with the bit b6 (MOSI)) of the
interfaces when a bank of up to 2 NCN6804 (total of 4
interfaces) shares the same digital bus.
Synchronous Mode
input/output are not used. The clock and the data are
provided and transferred through the SPI bus using MOSI
and MISO as shown Table 2.
devices want to be implemented, it is no longer possible to
share the same CS signal. Consequently in this particular
case and when the devices operate in a multiple interface
mode a dedicated CS signal must be provided to each
NCN6804 device.
card data, programming the CRD_VCC output voltage shall
be done by sending a previous MOSI message according to
Table 2 using the address [b7, b6, b5] = [0, S1, A/B]. For
example if a synchronous card is used, prior to make a
transaction with it, it will be powered-up for example at 5
V by sending the command %00000011 (address S1 = 0 and
card A selected).
WRT_REG [b4] during the chip programming sequence.
Since this bit shall be LOW to address the internal register
of the chip, care must be observed as this signal will be
immediately transferred tot he CRD_RSTA/B pin.
Startup Default Conditions
POR (Power On Reset) circuit sets the chip in the default
conditions as defined below (Table 4).
Card Detection
pin 23 for Card B and pin 2 for Card A. The internal circuit
provides a positive bias of this pin and the polarity of the
insertion/extraction is programmable by the MOSI protocol
as depicted Table 2.
to avoid leakage to ground from this pin to maintain the logic
Table 4. STARTUP DEFAULT CONDITIONS
In this mode, the S1 pin is used to define the physical
In this mode, the CLK_IN clock input and the I/O
When this operating mode is used and if two NCN6804
Since bits [b4 – b0] of the MOSI register contain the smart
The CRD_RSTA/B pin reflects the content of the MOSI
At startup, when power supply is turned on, the internal
The card is detected by the external switch connected to
The bias current is 1mA typical and cares must be observed
I/O Pull-up resistor
CRD_VCCA/B
CRD_DETA/B
CRD_CLKA/B
CRD_CLKA/B
Protocol
INT
Normally Open
tr & tf = SLOW
Special Mode
Connected
LOW
OFF
High
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NCN6804
13
function. In particular, using a low impedance probe (< 1
MW) might lead to uncontrolled operation during the debug.
be detected either by a Normally Open (default condition) or
a Normally Close switch (see Table 2). On the other hand,
the meaning of the feedback message contained in the MISO
register bit b4 depends upon the SPI mode of operation as
defined here below:
SPI Normal Mode: the MISO bit b4 is High when a card is
inserted, whatever be the polarity of the card detect switch.
SPI Special Mode: the MISO bit b4 copies the logic state of
the Card detect switch as depicted here below, whatever be
the polarity of the switch used to handle the detection:
CRD_VCC Operation
converters. Each of them can be programmed to provide one
of the three possible values, 1.8 V, 3.0 V or 5.0 V, assuming
the input voltage VDDPA or B is within the 2.7 V to 5.5 V
range. Card A and Card B can be independently powered-up
or down. Consequently if necessary for example the device
can be switched from card A to card B while the card A
power voltage is maintained (this is of course true from A to
B or from B to A). CRD_VCCA & B are voltage regulated
and protected against overload by a current overload
detection system. The DC/DC converter operates as a
buck/boost converter. The power conversion mode is
automatically switched to handle one of these two modes of
operation depending upon the voltage difference between
the CRD_VCCA or B and VDDPA or B respectively.
Table 5; these values comply with the smart card ISO7816
standard and related.
built-in comparator makes sure the voltage is within the
ISO7816-3/EMV specifications. If the voltage is no longer
within the minimum/maximum values, the DC/DC is
switched off, the powerdown sequence takes place and an
interrupt is presented at the INT Pin 24.
Table 5. CRD_VCCA OR B OUTPUT VOLTAGE
DEFINITION
CRD_VCCA or B
Depending upon the programmed condition, the card can
The dual NCN6804 interface has 2 built-in DC/DC
The CRD_VCCA or B output current range is given
Whatever is the CRD_VCCA or B output voltage, a
CRD_DETA/B = Low ⇒ MISO / b4 = LOW
CRD_DETA/B = High ⇒ MISO / b4 = HIGH
1.8 V
3.0 V
5.0 V
Current range
0 to 35+ mA
0 to 60+ mA
0 to 65+ mA
per Card
(Card A and Card
Current Range
0 to 120 + mA
0 to 130 + mA
0 to 70 + mA
Cumulated
B)