w83627sf Winbond Electronics Corp America, w83627sf Datasheet - Page 59

• Manufacturer Part Number: w83627sf
• Description: Winbond I/o
• Manufacturer: Winbond Electronics Corp America

4.2.4 Handshake Status Register (HSR) (Read/Write)
This register reflects the current state of four input pins for handshake peripherals such as a modem and
records changes on these pins.
Bit 7: This bit is the opposite of the DCD input. This bit is equivalent to bit 3 of HCR in loopback mode.
Bit 6: This bit is the opposite of the RI input. This bit is equivalent to bit 2 of HCR in loopback mode.
Bit 5: This bit is the opposite of the DSR input. This bit is equivalent to bit 0 of HCR in loopback mode.
Bit 4: This bit is the opposite of the CTS input. This bit is equivalent to bit 1 of HCR in loopback mode.
Bit 3:
Bit 2: FERI. This bit indicates that the RI pin has changed from low to high state after HSR was read
Bit 1: TDSR. This bit indicates that the DSR pin has changed state after HSR was read by the CPU.
Bit 0: TCTS. This bit indicates that the CTS pin has changed state after HSR was read.
by the CPU.
TDCD. This bit indicates that the DCD pin has changed state after HSR was read by the
CPU.
7
6
5
4
3
2
1
- 52 -
0
Clear to send (CTS)
Data set ready (DSR)
Ring indicator (RI)
Data carrier detect (DCD)
CTS toggling (TCTS)
RI falling edge (FERI)
DCD toggling (TDCD)
DSR toggling (TDSR)
Publication Release Date: Nov. 2000
PRELIMINARY
W83627SF
Revision 0.60