w83627sf Winbond Electronics Corp America, w83627sf Datasheet - Page 62

no-image

w83627sf

Manufacturer Part Number
w83627sf
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
4.2.7 Interrupt Control Register (ICR) (Read/Write)
This 8 -bit register allows the five types of controller interrupts to activate the interrupt output signal
separately. The interrupt system can be totally disabled by resetting bits 0 through 3 of the Interrupt
Control Register (ICR). A selected interrupt can be enabled by setting the appropriate bits of this
register to a logical 1.
Bit 7-4: These four bits are always logic 0.
Bit 3: EHSRI. Setting this bit to a logical 1 enables the handshake status register interrupt.
Bit 2: EUSRI. Setting this bit to a logical 1 enables the UART status register interrupt.
Bit 1: ETBREI. Setting this bit to a logical 1 enables the TBR empty interrupt.
Bit 0: ERDRI. Setting this bit to a logical 1 enables the RBR data ready interrupt.
4.2.8 Programmable Baud Generator (BLL/BHL) (Read/Write)
Two 8-bit registers, BLL and BHL, compose a programmable baud generator that uses 24 MHz to
generate a 1.8461 MHz frequency and divides it by a divisor from 1 to 2
baud generator is the baud rate multiplied by 16, and this is the base frequency for the transmitter and
receiver. The table in the next page illustrates the use of the baud generator with a frequency of 1.8461
MHz. In high-speed UART mode (refer to CR0C bit7 and CR0C bit6), the programmable baud generator
directly uses 24 MHz and the same divisor as the normal speed divisor. In high-speed mode, the data
transmission rate can be as high as 1.5M bps.
7
0
0
6
5
0
4
0
3
2
1
0
RBR data ready interrupt enable (ERDRI)
TBR empty interrupt enable (ETBREI)
UART receive status interrupt enable (EUSRI)
Handshake status interrupt enable (EHSRI)
- 55 -
Publication Release Date: Nov. 2000
16
-1. The output frequency of the
PRELIMINARY
W83627SF
Revision 0.60

Related parts for w83627sf