w83977ctf Winbond Electronics Corp America, w83977ctf Datasheet - Page 131
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w83977ctf
Manufacturer Part Number
w83977ctf
Description
Winbond I/o
Manufacturer
Winbond Electronics Corp America
Datasheet
1.W83977CTF.pdf
(161 pages)
- Current page: 131 of 161
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CRF3 (Default 0x00)
CRF4 (Default 0x00)
Bit 2: FDCTRAPSTS. FDC trap status.
Bit 1: URATRAPSTS. UART A trap status.
Bit 0: URBTRAPSTS. UART B trap status.
Bit 7: Reserved. Return zero when read.
Bit 6 - 0: Device's IRQ status.
These bits indicate the IRQ status of the individual device respectively. The device's IRQ status
bit
Bit 5: MOUIRQSTS. MOUSE IRQ status.
Bit 4: KBCIRQSTS. KBC IRQ status.
Bit 3: PRTIRQSTS. printer port IRQ status.
Bit 2: FDCIRQSTS. FDC IRQ status.
Bit 1: URAIRQSTS. UART A IRQ status.
Bit 0: URBIRQSTS. UART B IRQ status.
Bit 7 - 5: Reserved. Return zero when read.
Bit 4 and Bit 2 - 0:These bits indicate the status of the individual GPIO function respectively. The
Bit 4: WDTIRQSTS. Watch dog timer IRQ status at logical device 8.
is set by their source device and is cleared by writing a 1. Writing a 0 has no effect.
Bit 6: URCIRQSTS. UART C IRQ status.
Bit 3: Reserved. Return zero when read.
status is set by their source function and is cleared by writing a 1. Writing a 0 has no effect.
Bit 2: COMIRQSTS. Common IRQ status of GP20 - GP25 at logical device 8.
Bit 1: GP11IRQSTS. GP11 interrupt steering status at logical device 7.
Bit 0: GP10IRQSTS. GP10 interrupt steering status at logical device 7.
= 0
= 1
= 0
= 1
= 0
= 1
FDC is now in the sleeping state.
FDC is now in the working state due to any FDC access, any IRQ, any DMA
acknowledge, or any enabling of the motor enable bits in the DOR register.
UART A is now in the sleeping state.
UART A is now in the working state due to any UART A access, any IRQ, the
receiver begins receiving a start bit, the transmitter shift register begins transmitting a
start bit, or any transition on MODEM control input lines.
UART B is now in the sleeping state.
UART B is now in the workinging state due to any UART B access, any IRQ, the
receiver begins receiving a start bit, the transmitter shift register begins transmitting a
start bit, or any transition on MODEM control input lines.
-122 -
Publication Release Date: March 1999
W83977EF/ CTF
PRELIMINARY
Revision A1
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