ada4897-1arz-rl Analog Devices, Inc., ada4897-1arz-rl Datasheet - Page 22
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ada4897-1arz-rl
Manufacturer Part Number
ada4897-1arz-rl
Description
1 Nv/?hz, Low Power, Rail-to-rail Output Amplifiers
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADA4897-1ARZ-RL.pdf
(28 pages)
ADA4896-2/ADA4897-1
LOW NOISE GAIN SELECTABLE AMPLIFIER
A gain selectable amplifier makes processing a wide range of
input signals possible. The traditional gain selectable amplifier
involves switches in the feedback loops connecting to the
inverting input. In this case the switch resistance degrades the
noise performance of the amplifier, as well as adding significant
capacitance on the inverting input node. The noise and capaci-
tance issue can be especially bothersome when working with
low noise amplifiers. Also, the switch resistances contribute to
nonlinear gain error, which is undesirable.
Figure 50 presents an innovative switching technique used in
the gain selectable amplifier such that the 1 nV/Hz noise per-
formance of the
gain error is much reduced. With this technique, one can also
choose switches with minimal capacitance, which optimizes the
bandwidth of the circuit. In this circuit, the switches are
implemented with the
that either S1A and S2A are on, or S1B and S2B are on. In this
example, when the S1A and S2A switches are on, the first stage
amplifier gain is +4. When the S1B and S2B switches are on, the
first stage amplifier gain is +2. The first set of switches of the
ADG633
second set of switches is used to sample at a point (V1 and V2)
where switch resistances and nonlinear resistances do not matter.
This way, the gain error can be reduced while preserving the
noise performance of the ADA4896-2/ADA4897-1.
–0.05
–0.10
–0.15
–0.20
–0.25
–0.30
–0.35
–0.40
0.05
0
0
is put in the output side of the feedback loop and the
ADA4896-2
Figure 50. Using the
Figure 51. Gain Errors at V
0.5
ADG633
INPUT VOLTAGE (V)
V
02
is preserved, while the nonlinear
1.0
and they are configured such
V
IN
ADA4896-2
150Ω
R
G1
01
V
01
vs. V
2
3
1.5
ADA4896-2
and the
02
–5V
+5V
8
4
ADG633
2.0
450Ω
150Ω
R
R
14.0
13.5
13.0
12.5
12.0
11.5
11.0
F2
F1
1
V
to Construct a Low Noise Gain Selectable Amplifier to Drive a Low Resistive Load
01
D1
Rev. 0 | Page 22 of 28
S1B
S1A
V1
V2
It should be noted that the input bias current of the output
buffer can cause problems with the impedance of the S2A and
S2B sampling switches. Both sampling switches are not only
nonlinear with voltage but with temperature as well. If this is an
issue, place the unused switch of the ADG633 in the feedback
path of the output buffer, as shown in Figure 50, to balance the
bias currents.
The following derivation shows that sampling at V1 yields the
desired signal gain without gain error. R
resistance. V2 can be derived with the same method.
Substituting (1) into (2), the following derivation is obtained
Figure 51 compares the gain errors when the output signal is
sampled at V
sampling at V
Equation 3. Figure 52 shows the normalized frequency response
of the circuit at V
S2B
S2A
V
V
V
D2
–12
–15
–18
–21
–24
–27
–30
01
1
1
–3
–6
–9
6
3
0
100k
=
USING S3B IS OPTIONAL
=
=
6
5
V
V
V
V
R
V
S
IN
L
ADA4896-2
01
IN
IN
= ±5V
= 1kΩ
= 100mV p-p
01
S3B
×
×
02
×
vs. V
–5V
⎛
⎜ ⎜
⎝
Figure 52. Frequency Response of V
+5V
8
4
⎛
⎜ ⎜
⎝
reduces the gain error significantly, as predicted in
⎛
⎜
⎜
⎝
R
1
1
02
+
F1
.
+
R
02
R
R
1M
+
R
F1
D3
for a range of dc inputs. Note that
G1
F1
F1
R
+
R
G1
⎞
⎟ ⎟
⎠
7
V
+
G1
R
FREQUENCY (Hz)
02
+
G1
R
S1
R
S1
⎞
⎟
⎟
⎠
⎞
⎟ ⎟
⎠
10M
R
L
G = +4
S
denotes the switch
02
100M
/V
IN
G = +2
500M
(1)
(2)
(3)