adl5812xcpz-r7 Analog Devices, Inc., adl5812xcpz-r7 Datasheet

adl5812xcpz-r7

Manufacturer Part Number

adl5812xcpz-r7

Description

700 Mhz To 2800 Mhz, Dual-balanced Mixer, Lo Buffer, If Amplifier, And Rf Balun

Manufacturer

Analog Devices, Inc.

Datasheet

1.ADL5812XCPZ-R7.pdf (14 pages)

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Preliminary Technical Datasheet

FEATURES

RF frequency range of 700 MHz to 2800 MHz

LO frequency range of 450MHz to 2760MHz

IF frequncy rnage of 40 MHz to 450 MHz

Power conversion gain of 7dB

SSB noise figure of 11dB

Input IP3 of 24dBm over the full RF bandwidth

Input P1dB of 11 dBm over the full RF bandwidth

Typical LO drive of 0 dBm

Single-ended, 50 RF Port

Single-ended or Balanced LO Input Port

Single-supply operation: 3.6 to 5.0V

Serial port interface control on all functions

Exposed paddle 6 x 6 mm, 40 Lead LFCSP

APPLICATIONS

Multi-band/ multi-standard cellular base station diversity

receivers

Wideband radio link diversity downconverters

Multi-mode cellular extenders and picocells

GENERAL DESCRIPTION

The ADL5812 uses revolutionary new broadband square wave

limiting LO amplifiers to achieve an unprecedented RF

bandwidth of 700 to 2800MHz. Unlike conventional

narrowband sine wave LO amplifier solutions, this permits the

LO to be applied either above or below the RF input over an

extremely wide bandwidth. Since energy storage elements are

not utilized, the DC current consumption also decreases with

decreasing LO frequency.

The ADL5812 utilizes highly linear doubly balanced passive

mixer cores along with integrated RF and LO balancing circuits

to allow for single-ended operation. The ADL5812 incorporates

programmable RF baluns allowing for optimal performance

over a 700 to 2800 MHz RF input frequency. The balanced

passive mixer arrangement provides outstanding LO to RF and

LO to IF leakages, excellent RF to IF isolation, and excellent

intermodulation performance over the full RF bandwidth.

REV. PrA

Information furnished by Analog Devices is believed to be accurate and reliable.

However, no responsibility is assumed by Analog Devices for its use, nor for any

infringements of patents or other rights of third parties that may result from its use.

Specifications subject to change without notice. No license is granted by implication

or otherwise under any patent or patent rights of Analog Devices. Trademarks and

registered trademarks are the property of their respective companies.

700 MHz to 2800 MHz, Dual-Balanced Mixer,

LO Buffer, IF Amplifier, and RF Balun

RFCT1

RFCT2

The balanced mixer cores also provide extremely high input

linearity allowing the device to be used in demanding wideband

applications where in-band blocking signals may otherwise

result in the degradation of dynamic range. Blocker Noise

Figure performance is comparable to narrowband passive mixer

designs. High linearity IF buffer amplifiers follow the passive

mixer cores, yielding typical power conversion gains of 7dB,

and can be utilized with a wide range of output impedances.

For low voltage applications, the ADL5812 is capable of

operation at voltages down to 3.6V with substantially reduced

current. Two logic pins are provided to individually power

down (<100uA) the 2 channels as desired.

All features of the ADL5812 are controlled via a 3-wire serial

port interface resulting in optimum performance and minimum

external components.

The ADL5812 is fabricated using a BiCMOS high performance

IC process. The device will be available in a 6mm x 6mm 40-

lead LFCSP package and operates over a −40°C to +85°C

temperature range. An evaluation board is also available.

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.326.8703

RF1

RF2

VPIF2 IFGM2 NC IFOP2 IFON2 NC IFGD2 V2LO4 V2LO3 V2LO2

VPIF1 IFGM1

Figure 1. Functional Block Diagram

NC IFOP1 IFON1 NC IFGD1 V1LO4 V1LO3 V1LO2

Bias Gen

ADL5812

Serial

Port

Interface

www.analog.com

ADL5812

V1LO1

DATA

CLK

LOIP

LOIN

V2LO1

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adl5812xcpz-r7 Summary of contents

Page 1

... NC IFOP1 IFON1 NC IFGD1 V1LO4 V1LO3 V1LO2 ADL5812 Bias Gen Serial Port Interface Figure 1. Functional Block Diagram www.analog.com © 2011 Analog Devices, Inc. All rights reserved. V1LO1 LOIP 26 LOIN DATA 23 CLK 22 V2LO1 21 ...

Page 2

ADL5812 ADL5812—Specifications Table 25 1900 MHz Parameter RF INPUT INTERFACE Return Loss Input Impedance RF Frequency Range OUTPUT INTERFACE Output Impedance IF Frequency Range 1 DC Bias ...

Page 3

Preliminary Technical Datasheet TIMING CHARACTERISTICS Table 2. Serial Interface Timing ± Parameter Limit ...

Page 4

ADL5812 A BSOLUTE MAXIMUM RATINGS 0 B Table 3. Parameter Supply Voltage, V POS CLK, DATA Output Bias RF Input Power LO Input Power Internal Power Dissipation θ (Exposed Paddle Soldered Down) JA θ (At Exposed Paddle) JC ...

Page 5

Preliminary Technical Datasheet P IN CONFIGURATION AND FUNCTION DESCRIPTIONS 1 B RF1 1 RFCT1 RFCT2 9 RF2 10 NOTES CONNECT. 2. EXPOSED PAD ...

Page 6

ADL5812 T YPICAL PERFORMANCE CHARACTERISTICS 25°C, as measured using typical circuit schematic with low-side LO unless otherwise noted 500 ...

Page 7

Preliminary Technical Datasheet 0 ‐10 ‐20 ‐30 ‐40 ‐50 ‐60 ‐70 ‐80 500 1000 1500 RF FREQUENCY (MHz) Figure 10 Leakage versus RF Frequency 0 ‐10 ‐20 ‐30 ‐40 ‐50 ‐60 500 1000 1500 RF FREQUENCY (MHz) ...

Page 8

ADL5812 0 -5 -10 -15 -20 -25 -30 -35 -40 -45 -50 300 500 700 900 1100 RF FREQUENCY (MHz) Figure 16. 2× Leakage versus RF Frequency 0 ‐10 ‐20 ‐30 ‐40 ‐50 ‐60 300 500 700 900 ...

Page 9

Preliminary Technical Datasheet SPUR TABLES All spur tables are (N × − (M × and were measured using the standard evaluation board. Mixer spurious products are measured dBc from the IF output power ...

Page 10

ADL5812 REGISTER STRUCTURE Figure 22 illustrates the register map of ADL5812. The ADL5812 uses only register 5. As such the Control Bits should be set all cases. The Main ENB and Div ENB bits, DB7 and DB6 ...

Page 11

Preliminary Technical Datasheet RF (MHz) LO (MHz) DB21 DB20 DB19 DB18 DB17 DB16 DB15 VGS2 VGS1 VGS0 LPF2 LPF1 LPF0 CDO3 DCDO2 CDO1 CDO0 CDI3 CDI2 CDI1 CDI0 300 97 0 400 197 0 500 297 0 600 397 0 ...

Page 12

ADL5812 EVALUATION BOARD An evaluation board is available for the ADL5812. The standard evaluation board schematic is presented in Figure 24. The evaluation board is fabricated on a multilayer Rogers board. Table 4 details the various configuration options of the ...

Page 13

Preliminary Technical Datasheet Table 4. Eval Board Configuration Components Function C1, C10, C21, Power Supply Decoupling. Nominal supply decoupling consists a 10 μF capacitor C34-C43 to ground in parallel with 10pF capacitors to ground positioned as close to the device ...

Page 14

... SQ 5.90 PIN 1 INDICATOR TOP VIEW 0.80 0.75 0.70 SEATING PLANE O RDERING GUIDE 6 B Temperature Models Range 1 ADL5812XCPZ-R7 −40°C to +85° ADL5812-EVALZ Pb-free part. 40-Lead Lead Frame Chip Scale Package [LFCSP_WQ Body, Very Very Thin Quad (CP-40-14) Dimensions shown in millimeters 0.50 BSC 0.45 0.40 0.35 0.05 MAX ...

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