adl5812xcpz-r7 Analog Devices, Inc., adl5812xcpz-r7 Datasheet - Page 10

• Manufacturer Part Number: adl5812xcpz-r7
• Description: 700 Mhz To 2800 Mhz, Dual-balanced Mixer, Lo Buffer, If Amplifier, And Rf Balun
• Manufacturer: Analog Devices, Inc.

ADL5812
REGISTER STRUCTURE
Figure 22 illustrates the register map of ADL5812. The
ADL5812 uses only register 5. As such the Control Bits should
be set to 5 in all cases. The Main ENB and Div ENB bits, DB7
and DB6 respectively, when set to 0 will enable the part. By
setting one of these bits to 1 that channel will be powered down.
Either channel can be powered down independently of the
other. The CAP DAC RFB IN and Out bits are used to tune the
RF Balun. In most cases they will be tuned together with the
higher settings, 15, tuning for low frequencies and lower
settings, 0, tuning for high frequencies. There are times where
it becomes advantageous to tune the input and output of the RF
VGS2
0
1
'
VGS1 VGS0
0
1
'
RESERVED
DB23
0
0
1
'
DB22
0
LPF2
0
1
'
VGS2
DB21
VGS SETTING
LPF1
0
1
'
0
7
'
VGS
VGS1
DB20
LPF0 LOW PASS FILTER SETTING
0
1
'
VGS0
DB19
CDO3 DCDO2 CDO1 CDO0 RF BALUN OUTPUT TUNING
DB18
0
1
LPF2
'
0
7
'
0
1
LPF
DB17
LPF1
'
0
1
DB16
'
LPF0
0
1
'
CDO3 DCDO2 CDO1
DB15
RFB OUT CAP DAC
Figure 22. ADL5812 Register Maps
DB14
REV. PrA | Page 10 of 14
DB13
15
0
'
CDO0
DB12
balun separately and that ability is provided for here. The LPF
bits control the Low Pass Filter settings at the IF output. The
ability to tune the low pass filter allows some tradeoff between
Gain, Noise Figure and Input IP3 with higher settings, 7,
providing higher Input IP3 at the cost of some Gain and Noise
Figure while lower settings, 0, provide higher Gain and lower
NF at the cost of lower Input IP3. The VGS bits control the
VGS settings of the mixer core and will allow further tuning of
the device.
Figure 23 illustrates the optimum settings characterized for
each frequency band.
DB11
CDI3
RFB IN CAP DAC
CDI3
0
1
'
DB10
CDI2
CDI2
0
1
'
CDI1
DB9
Preliminary Technical Datasheet
CDI1
0
1
'
CDI0
DB8
CDI0
0
1
'
MAIN
ENB
MEN
DB7
MEN
0
1
RF BALUN INTPUT TUNING
ENB
DEVICE DISABLED
DEN
DIV
DB6
DEN
DEVICE ENABLED
0
1
MAIN ENABLE
15
DIVERSITY ENABLE
0
'
DEVICE DISABLED
DEVICE ENABLED
DB5
0
RESERVED
DB4
0
DB3
0
C3(1)
DB2
CONTROL BITS
C2(0)
DB1
C1(1)
DB0