ha9p2425-5 Intersil Corporation, ha9p2425-5 Datasheet
ha9p2425-5
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ha9p2425-5 Summary of contents
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Data Sheet µ 3.2 s Sample and Hold Amplifiers The HA-2420 and HA-2425 is a monolithic circuit consisting of a high performance operational amplifier with its output in series with an ultra-low leakage analog switch and JFET input unity ...
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Absolute Maximum Ratings Voltage Between V+ and V- Terminals .40V Differential Input Voltage . . . . . . . . ...
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... IN To ±1mV Hold Mode Settling Time Aperture Time (Note 3) Effective Aperture Delay Time Aperture Uncertainty Drift Current (Note HA1-2420 HA1-2425 HA3-2425, HA4P2425, HA9P2425 POWER SUPPLY CHARACTERISTICS Supply Current (+) Supply Current (-) Power Supply Rejection NOTES: = ± 2kΩ 50pF Derived from computer simulation only ...
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Test Circuits and Waveforms -IN INPUT S/H HOLD +IN CONTROL CAP C H S/H CONTROL INPUT FIGURE 1. HOLD STEP ERROR AND DRIFT CURRENT S/H CONTROL OUTPUT ∆t NOTE: Measure the slope of the output during hold, ∆V/∆t, and compute ...
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Schematic Diagram 106 105 ...
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Application Information HOLD STEP VOLTAGE (mV) + INPUT VOLTAGE (V) -5 -10 -15 -20 -25 -30 -35 FIGURE 5. HOLD STEP vs INPUT VOLTAGE Offset Adjustment The offset voltage of the HA-2420 and HA-2425 ...
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CONTROL GND HOLD CAPACITOR OUT V+ FIGURE 9. GUARD RING LAYOUT (BOTTOM VIEW) Glossary of Terms Acquisition Time The time required following a “sample” command, for the output to reach its final value within ±0.1% or ±0.01%. This is the ...
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Typical Performance Curves 1000 MIN. SAMPLE TIME DRIFT DURING HOLD o FOR 0.1% ACCURACY (mV/s) 10V SWINGS (µs) 100 UNITY GAIN PHASE MARGIN (DEGREES) 10 1.0 UNITY GAIN BANDWIDTH (MHz) 0.1 SLEW RATE (V/µs) 0.01 10pF 100pF ...
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Typical Performance Curves S/H (5V/DIV OUT (2V/DIV.) -10V TIME (1µs/DIV) FIGURE 16. ACQUISITION TIME (C S/H (5V/DIV OUT (0.5V/DIV.) -1V TIME (1µs/DIV) FIGURE 18. ACQUISITION TIME (C S/H (5V/DIV OUT (50mV/DIV.) -0.1V TIME (500ns/DIV) ...
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Die Characteristics DIE DIMENSIONS: 102 mils x 61 mils x 19 mils 2590µm x 1550µm x 483µm METALLIZATION: Type: Al ±2k Å Å Thickness: 16k SUBSTRATE POTENTIAL: V- BACKSIDE FINISH: Gold, Nickel, Silicon, etc. Metallization Mask Layout VOS ...
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Dual-In-Line Plastic Packages (PDIP INDEX N/2 AREA -B- -A- D BASE PLANE -C- SEATING PLANE 0.010 (0.25 NOTES: 1. Controlling Dimensions: INCH. In case of conflict between ...
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... Intersil Corporation’s quality certifications can be viewed at www.intersil.com/design/quality Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use ...