clc407 National Semiconductor Corporation, clc407 Datasheet - Page 6

• Manufacturer Part Number: clc407
• Description: Low-cost, Low-power Programmable Gain Buffer With Disable
• Manufacturer: National Semiconductor Corporation

Use
operating this amplifier. Choose quality 0.1 F ceramics
for C
for C
inches from the power pins. Place the 6.8 F capacitors
within 3/4 inches from the power pins.
Special Evaluation Board
Considerations for the CLC407
To optimize off-isolation of the CLC407, cut the R
both the 730013 and the 730027 evaluation boards. This
cut minimizes capacitive feedthrough between the input
and the output. Figure 4 shows where to cut both evalu-
ation boards for improved off-isolation.
Video Performance vs. I
Improve the video performance of the CLC407 by drawing
extra current from the amplifier’s output stage. Using a
single external resistor as shown in Figure 5, you can
adjust the differential phase. Video performance vs. I
illustrated below in Graph 2.
positive video performance with negative synchronization
pulses.
The value for Rpd in Figure 5 is determined by:
at + 5V supplies.
http://www.national.com
730013
REV C
1
3
and C
power-supply
and C
0.25
0.20
0.15
0.10
0.05
0
Differential Gain & Phase vs. I
0
2
. Choose quality 6.8 F tantalum capacitors
Cut trace here
4
. Place the 0.1 F capacitors within 0.1
2
Phase
Gain
4
6
R
bypassing
Figure 4
Graph 2
I
pd
EX
EX
8
in mA
I
10
EX
5
Cut trace here
-V
cc
12
This graph represents
GND
R5
+
+V
14
cc
EX
capacitors
C7
C8
C5
IN
16
405 G
C1
18
C6
RF
C2
A N a t i o n a l S e m i c o n d u c t o r C o m p a n y
0.25
0.20
0.15
0.10
0.05
0
Comlinear
f
( 3 0 3 ) 2 2 6 - 0 5 0 0
R8
OUT
trace on
407 Fig 3 (Right)
h1
+
when
EX
is
6
Video Cable Driver
The CLC407 was designed to produce exceptional video
performance at all three closed-loop gains. At the non-
inverting gain of 2V/V configuration, back terminate the
cable using R
shown below in Figure 6.
N:1 Mux Cable Driver
The CLC407 is capable of multiplexing several signals on a
single analog output bus. The front page shows how a 2:1
multiplexer is implemented. An N:1 multiplexer is implement-
ed in an analogous fashion by using an N:1 decoder to
enable/disable the appropriate number of CLC407’s.
Model
CLC407AJP
CLC407AJE
CLC407AIB
CLC407ALC
CLC407A8B
CLC407AMC
Contact factory for other packages and DESC SMD number.
Plastic (AJP)
Surface Mount (AJE)
CerDip
SMA
Input
Package
Input
SMA
J
50
Package Thermal Resistance
1
R
= 0
J
in
50
1
R
= 0
in
0.1 fd
Temperature Range
out
Ordering Information
-40
-40
-40
-40
-55
-55
2
3
1
4
C
. A typical cable driving configuration is
˚
˚
˚
˚
˚
˚
2
C to +85
C to +85
C to +85
C to +85
C to +125
C to +125
2
3
4
1
0.1 fd
CLC407
6.8 fd
CLC407
C
2
Figure 5
Figure 6
C
˚
˚
˚
˚
4
C
C
C
C
130
˚
˚
75
65
C
C
6.8 fd
q
˚
˚
jc
˚
6
+
/W
/W
8
7
5
/W
-5V
C
8
7
6
5
4
0.1 fd
R
8-pin PDIP
8-pin SOIC
8-pin CerDIP
dice
8-pin CerDIP, MIL-STD-883
dice, MIL-STD-883
R
50
pd
out
0.1 fd
+
C
1
C
R
50
I
1
EX
Description
out
Coax
6.8 fd
50
-5V
6.8 fd
C
125
150
155
3
q
C
SMA
Output
jA
˚
˚
˚
3
/W
/W
/W
+
+5V
Video
Output
50
+
+5V