sae81c80a Infineon Technologies Corporation, sae81c80a Datasheet - Page 13

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sae81c80a

Manufacturer Part Number
sae81c80a
Description
Cmos Dual-port Ram
Manufacturer
Infineon Technologies Corporation
Datasheet

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Access Collisions
With a RAM which can be written to or read simultaneously by two controllers, different
kinds of access collision are possible:
1. Simultaneous read access to the same memory location from both ports;
2. One port reads the same memory location which the other port writes to concurrently;
3. Concurrent write access to the same memory location from both ports;
4. Read access to a logically linked data block by one port, while the other port modifies
The SAE 81C80A dual-port RAM avoids the first three types of access collision by
hardware. The fourth problem can be solved by user software.
The standard solution for the access collisions described above would be as follows:
before accessing the memory area, an additional memory location must be established
by setting an access flag (semaphore). This would necessitate three memory
operations:
Only after this sequence would a microcontroller be privileged for access and could write
or read to the data area without the risk of contention.
With the SAE 81C80A dual-port RAM this access routine is simplified using scheduling
registers.
Semiconductor Group
the same data block.
– First access: read the flag and check whether the data area is free.
– Second access: write the flag with the data for reservation.
– Third access: read the flag and make sure that your own reservation has not been
overwritten by the other port.
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SAE 81C80 A

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