sae81c80a Infineon Technologies Corporation, sae81c80a Datasheet - Page 9

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sae81c80a

Manufacturer Part Number
sae81c80a
Description
Cmos Dual-port Ram
Manufacturer
Infineon Technologies Corporation
Datasheet

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Interrupt Outputs
The DPR has three interrupt outputs that can be set and reset directly by writing to an
address (see table 1). The outputs are located in the same address range as the
scheduling registers. However, only bits 2 and 3 are relevant for the interrupt outputs. At
least one of bits 0 and 1 should be other than 1 to prevent the scheduling registers from
being affected. The functions of the outputs are shown in the following table:
RES
1
1
1
1
0
Oscillator Watchdog
This part of the circuit is a fail-save mechanism for the oscillator. If the frequency of the
clock is missing, the output switches to WDO low. The circuit works like an analog
integrator. Below approx. 100 kHz, low pulses are produced on the output. The pulse
width depends on the clock frequency. This part of the circuit should not be used at
operating frequencies of les than 500 kHz.
Supply Voltage
To prevent any interference, the supply voltage of the DPR should be blocked as close
as possible to the pins with a capacitor of approx. 100 nF (see application circuit).
Semiconductor Group
Bit 3
0
0
1
1
9
Bit 2
0
1
0
1
Output
no change
1
0
undefined
0
SAE 81C80 A

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