adcmp600 Analog Devices, Inc., adcmp600 Datasheet

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adcmp600

Manufacturer Part Number
adcmp600
Description
Rail-to-rail, Very Fast, 2.5 V To 5.5 V, Single-supply Ttl/cmos Comparators
Manufacturer
Analog Devices, Inc.
Datasheet

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FEATURES
Fully specified rail to rail at V
Input common-mode voltage from −0.2 V to V
Low glitch CMOS-/TTL-compatible output stage
3.5 ns propagation delay
10 mW at 3.3 V
Shutdown pin
Single-pin control for programmable hysteresis and latch
Power supply rejection > 50 dB
Improved replacement for MAX999
−40°C to +125°C operation
APPLICATIONS
High speed instrumentation
Clock and data signal restoration
Logic level shifting or translation
Pulse spectroscopy
High speed line receivers
Threshold detection
Peak and zero-crossing detectors
High speed trigger circuitry
Pulse-width modulators
Current/voltage-controlled oscillators
Automatic test equipment (ATE)
GENERAL DESCRIPTION
The ADCMP600, ADCMP601, and ADCMP602 are very fast
comparators fabricated on XFCB2, an Analog Devices, Inc.
proprietary process. These comparators are exceptionally
versatile and easy to use. Features include an input range from
V
output drivers, and latch inputs with adjustable hysteresis
and/or shutdown inputs.
The device offers 5 ns propagation delay with 10 mV overdrive
on 3 mA typical supply current.
A flexible power supply scheme allows the devices to operate
with a single +2.5 V positive supply and a −0.5 V to +2.8 V
input signal range up to a +5.5 V positive supply with a −0.5 V
to +5.8 V input signal range. Split input/output supplies with no
sequencing restrictions on the ADCMP602 support a wide
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
EE
− 0.5 V to V
CC
+ 0.2 V, low noise, TTL-/CMOS-compatible
CC
= 2.5 V to 5.5 V
CC
+ 0.2 V
Single-Supply TTL/CMOS Comparators
Rail-to-Rail, Very Fast, 2.5 V to 5.5 V,
ADCMP600/ADCMP601/ADCMP602
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
input signal range while still allowing independent output
swing control and power savings.
The TTL-/CMOS-compatible output stage is designed to drive
up to 5 pF with full timing specs and to degrade in a graceful
and linear fashion as additional capacitance is added. The
comparator input stage offers robust protection against large
input overdrive, and the outputs do not phase reverse when the
valid input signal range is exceeded. Latch and programmable
hysteresis features are also provided with a unique single-pin
control option.
The ADCMP600 is available in 5-lead SC70 and SOT-23
packages, the ADCMP601 is available in a 6-lead SC70 package,
and the ADCMP602 is available in an 8-lead MSOP package.
NONINVERTING
INVERTING
(EXCEPT ADCMP600)
FUNCTIONAL BLOCK DIAGRAM
INPUT
INPUT
LE/HYS
©2006 Analog Devices, Inc. All rights reserved.
ADCMP600/
ADCMP601/
ADCMP602
Figure 1.
S
(ADCMP602 ONLY)
DN
www.analog.com
Q OUTPUT

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adcmp600 Summary of contents

Page 1

... Latch and programmable hysteresis features are also provided with a unique single-pin control option. The ADCMP600 is available in 5-lead SC70 and SOT-23 packages, the ADCMP601 is available in a 6-lead SC70 package, and the ADCMP602 is available in an 8-lead MSOP package. ...

Page 2

... ADCMP600/ADCMP601/ADCMP602 TABLE OF CONTENTS Features .............................................................................................. 1 Applications....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 Electrical Characteristics............................................................. 3 Timing Information ......................................................................... 5 Absolute Maximum Ratings............................................................ 6 Thermal Resistance ...................................................................... 6 Pin Configuration and Function Descriptions............................. 7 Typical Performance Characteristics ............................................. 8 Application Information................................................................ 10 REVISION HISTORY 10/06—Revision 0: Initial Version Power/Ground Layout and Bypassing..................................... 10 TTL-/CMOS-Compatible Output Stage ...

Page 3

... DC INPUT CHARACTERISTICS Voltage Range Common-Mode Range Differential Voltage Offset Voltage Bias Current Offset Current Capacitance Resistance, Differential Mode Resistance, Common Mode Active Gain Common-Mode Rejection Ratio Hysteresis (ADCMP600) Hysteresis (ADCMP601/ADCMP602) LATCH ENABLE PIN CHARACTERISTICS (ADCMP601/ADCMP602 Only HYSTERESIS MODE AND TIMING ...

Page 4

... Minimum Pulse Width POWER SUPPLY Input Supply Voltage Range Output Supply Voltage Range Positive Supply Differential (ADCMP602 Only) Positive Supply Current (ADCMP600/ADCMP601) Input Section Supply Current (ADCMP602 Only) Output Section Supply Current (ADCMP602 Only) Power Dissipation Power Supply Rejection Ratio Shutdown Mode I ...

Page 5

... TIMING INFORMATION Figure 2 illustrates the ADCMP600/ADCMP601/ADCMP602 latch timing relationships. Table 2 provides definitions of the terms shown in Figure 2. LATCH ENABLE DIFFERENTIAL INPUT VOLTAGE Q OUTPUT Table 2. Timing Descriptions Symbol Timing t Input to output high delay PDH t Input to output low delay PDL t Latch enable to output high delay ...

Page 6

... V) CCI ±50 mA Table 4. Thermal Resistance Package Type −0 0.5 V ADCMP600 SC70 5-Lead CCO ±50 mA ADCMP600 SOT-23 5-Lead ADCMP601 SC70 6-Lead ADCMP602 MSOP 5-Lead −0 0.5 V CCO 1 Measurement in still air. ±50 mA ESD CAUTION ±50 mA −40°C to +125°C 150° ...

Page 7

... TOP VIEW EE (Not to Scale Figure 3. ADCMP600 Pin Configuration Table 5. ADCMP600 (SOT-23-5 and SC70-5) Pin Function Descriptions Pin No. Mnemonic Description 1 Q Noninverting Output logic high if the analog voltage at the noninverting input, V than the analog voltage at the inverting input Negative Supply Voltage ...

Page 8

... ADCMP600/ADCMP601/ADCMP602 TYPICAL PERFORMANCE CHARACTERISTICS 2 25°C, unless otherwise noted. CCI CCO A 800 600 V = 2.5V CC 400 200 0 –200 –400 –600 –800 – LE/HYS (V) Figure 6. LE/HYS Pin I/V Characteristics 150 100 –50 –100 –150 – SHUTDOWN PIN VOLTAGE (V) Figure 7 ...

Page 9

... RISE 3.4 FALL 3.2 3.0 –0.6 0 0.6 1.2 1.8 COMMON-MODE VOLTAGE (V) Figure 13. Propagation Delay vs. Input Common-Mode Voltage 2 5.0 4.8 4.6 4.4 4.2 4.0 RISE 3.8 3.6 FALL 3.4 3.2 3.0 2.5 3.0 3.5 4.0 4.5 5.0 V (V) CCO Figure 14. Propagation Delay vs. V ADCMP600/ADCMP601/ADCMP602 1.00V/DIV = 2 2.4 3.0 500mV/DIV 5.5 6.0 CCO Rev Page M4.00ns Figure 15. 50 MHz Output Waveform M4.00ns Figure16. 50 MHz Output Waveforms @ 2.5 V ...

Page 10

... ADCMP600/ADCMP601/ADCMP602 APPLICATION INFORMATION POWER/GROUND LAYOUT AND BYPASSING The ADCMP600/ADCMP601/ADCMP602 comparators are very high speed devices. Despite the low noise output stage essential to use proper high speed design techniques to achieve the specified performance. Because comparators are uncompensated amplifiers, feedback in any phase relationship is likely to cause oscillations or undesired hysteresis ...

Page 11

... DISPERSION parasitics that reduce high speed performance and induce oscillation in some cases. These ADCMP600 features a fixed hysteresis of approximately 2 mV. The ADCMP601 and ADCMP602 comparators offer a programmable Hysteresis feature that can significantly improve accuracy and stability. Connecting an external pull-down resistor or a current source from the LE/HYS pin to GND, varies the amount of hysteresis in a predictable, stable manner ...

Page 12

... V /2, the direction of the bias current reverses CC and the measured offset voltages and currents change. The ADCMP600/ADCMP601/ADCMP602 comparators slightly elaborate on this scheme. Crossover points can be found at approximately 0.8 V and 1.6 V. MINIMUM INPUT SLEW RATE REQUIREMENT With the rated load capacitance and normal good PC Board ...

Page 13

... INPUT 1.25V ±50mV INPUT 1.25V REF CMOS CMOS OUTPUT 1.5MHz TO 30MHz Rev Page ADCMP600/ADCMP601/ADCMP602 2.5V ADCMP600 10kΩ 10kΩ ADCMP601 LE/HYS 10kΩ 82pF 40kΩ Figure 25. Oscillator and Pulse-Width Modulator 2. ADCMP601 LE/HYS DIGITAL 74 AHC INPUT 1G07 ...

Page 14

... ADCMP600BRJZ-R2 −40°C to +125°C 1 ADCMP600BRJZ-RL −40°C to +125°C 1 ADCMP600BRJZ-REEL7 −40°C to +125°C 1 ADCMP600BKSZ-R2 −40°C to +125°C 1 ADCMP600BKSZ-RL −40°C to +125°C ADCMP600BKSZ-REEL7 1 −40°C to +125°C 1 ADCMP601BKSZ-R2 −40°C to +125°C ADCMP601BKSZ-RL 1 −40°C to +125°C 1 ADCMP601BKSZ-REEL7 − ...

Page 15

... NOTES ADCMP600/ADCMP601/ADCMP602 Rev Page ...

Page 16

... ADCMP600/ADCMP601/ADCMP602 NOTES ©2006 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05914-0-10/06(0) Rev Page ...

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