adcmp600 Analog Devices, Inc., adcmp600 Datasheet - Page 12
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adcmp600
Manufacturer Part Number
adcmp600
Description
Rail-to-rail, Very Fast, 2.5 V To 5.5 V, Single-supply Ttl/cmos Comparators
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADCMP600.pdf
(16 pages)
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ADCMP600/ADCMP601/ADCMP602
Leaving the LE/HYS pin disconnected results in a fixed
hysteresis of 2 mV; driving this pin high removes hysteresis. The
maximum hysteresis that can be applied using this pin is
approximately 160 mV. Figure 21 illustrates the amount of
hysteresis applied as a function of the external resistor value,
and Figure 11 illustrates hysteresis as a function of the current.
The hysteresis control pin appears as a 1.25 V bias voltage seen
through a series resistance of 7 kΩ ± 20% throughout the hysteresis
control range. The advantages of applying hysteresis in this manner
are improved accuracy, improved stability, reduced component
count, and maximum versatility. An external bypass capacitor is
not recommended on the HYS pin because it impairs the latch
function and often degrades the jitter performance of the device.
As described in the Using/Disabling the Latch Feature section,
hysteresis control need not compromise the latch function.
CROSSOVER BIAS POINT
In both op amps and comparators, rail-to-rail inputs of this type
have a dual front-end design. Certain devices are active near the
V
mined point in the common-mode range, a crossover occurs. At
this point, normally V
and the measured offset voltages and currents change.
The ADCMP600/ADCMP601/ADCMP602 comparators
slightly elaborate on this scheme. Crossover points can be found
at approximately 0.8 V and 1.6 V.
CC
rail and others are active near the V
CC
/2, the direction of the bias current reverses
EE
rail. At some predeter-
Rev. 0 | Page 12 of 16
MINIMUM INPUT SLEW RATE REQUIREMENT
With the rated load capacitance and normal good PC Board
design practice, as discussed in the Optimizing Performance
section, these comparators should be stable at any input slew
rate with no hysteresis. Broadband noise from the input stage is
observed in place of the violent chattering seen with most other
high speed comparators. With additional capacitive loading or
poor bypassing, oscillation is observed. This oscillation is due to
the high gain bandwidth of the comparator in combination with
feedback parasitics in the package and PC board. In many
applications, chattering is not harmful.
250
200
150
100
50
0
50
V
CC
Figure 21. Hysteresis vs. R
V
CC
= 2.5V
= 5.5V
150
HYSTERESIS RESISTOR (kΩ)
250
350
HYS
Control Resistor
450
550
650