lm21215a-1 National Semiconductor Corporation, lm21215a-1 Datasheet - Page 11

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lm21215a-1

Manufacturer Part Number
lm21215a-1
Description
15a High Efficiency Synchronous Buck Regulator With Frequency Synchronization
Manufacturer
National Semiconductor Corporation
Datasheet
SHORT-CIRCUIT PROTECTION
In the unfortunate event that the output is shorted with a low
impedance to ground, the LM21215A-1 will limit the current
into the short by resetting the device. A short-circuit condition
is sensed by a current-limit condition coinciding with a voltage
on the FB pin that is lower than 100 mV. When this condition
occurs, the device will begin its reset sequence, turning off
THERMAL PROTECTION
Internal thermal shutdown circuitry is provided to protect the
integrated circuit in the event that the maximum junction tem-
perature is exceeded. When activated, typically at 165°C, the
LM21215A-1 tri-states the power FETs and resets soft start.
After the junction cools to approximately 155°C, the device
starts up using the normal start up routine. This feature is
provided to prevent catastrophic failures from accidental de-
vice overheating. Note that thermal limit will not stop the die
from operating above the specified operating maximum tem-
perature,125°C. The die should be kept under 125°C to guar-
antee correct operation.
FIGURE 2. Current Limit Conditions
11
both power FETs and discharging the soft-start capacitor after
t
restart. If the short-circuit condition still exists, it will reset
again, and repeat until the short-circuit is cleared. The reset
prevents excess current flowing through the FETs in a highly
inefficient manner, potentially causing thermal damage to the
device or the bus supply.
POWERGOOD FLAG
The PGOOD pin provides the user with a way to monitor the
status of the LM21215A-1. In order to use the PGOOD pin,
the application must provide a pull-up resistor to a desired DC
voltage (i.e. Vin). PGOOD will respond to a fault condition by
pulling the PGOOD pin low with the open-drain output.
PGOOD will pull low on the following conditions – 1) V
moves above or below the V
enable pin is brought below the enable threshold 3) The de-
vice enters a pre-biased output condition (V
Figure 3
RESETSS
shows the conditions that will cause PGOOD to fall.
(nominally 110 µs). The device will then attempt to
OVP
or V
UVP
, respectively 2) The
FB
30152119
>V
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SS
).
FB

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