m35075 Renesas Electronics Corporation., m35075 Datasheet
m35075
Available stocks
Related parts for m35075
m35075 Summary of contents
Page 1
... CRT display the liquid crystal display and the plasma display. It uses a silicon gate CMOS process and it housed in a 24-pin shrink SOP package (M35075-XXXFP). For M35075-001FP that is a standard ROM version of M35075- XXXFP respectively, the character pattern is also mentioned. FEATURES • ...
Page 2
... M35075-XXXFP PIN DESCRIPTION Pin Symbol Pin name Number 1 CPOUT Filter output 2 V Earthing pin SS2 Auto-clear input Chip select input 5 SCK/SCL Clock input 6 SIN/SDA Data input Data I/O 7 TCK External clock 8 P6 Port P6 output 9 P7 Port P7 output 10 V Power pin ...
Page 3
... M35075-XXXFP Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 ...
Page 4
... M35075-XXXFP MEMORY CONSTITUTION Address 000 to 11F are assigned to the display RAM, address 16 16 120 to 129 are assigned to the display control registers and 16 16 address 200 to 2F1 are assigned to the RAM characters. The 16 16 internal circuit is reset and all display control registers (address ...
Page 5
... M35075-XXXFP Address DAF DAE DAD DAC 200 201 202 203 204 205 206 207 208 209 20A 20B 0 BS ...
Page 6
... M35075-XXXFP Address DAF DAE DAD DAC 240 16 241 16 250 16 251 252 16 25F 16 Fig.4 Memory constitution (RAM character 2) Address DAF DAE DAD DAC 260 261 16 270 16 271 272 16 27F 16 Fig.5 Memory constitution (RAM character 3) ...
Page 7
... M35075-XXXFP Address DAF DAE DAD DAC 2A0 2A1 16 2B0 16 2B1 2B2 16 2BF 16 Fig.7 Memory constitution (RAM character 5) Address DAF DAE DAD DAC 2C0 2C1 16 2D0 16 2D1 2D2 16 2DF 16 Fig.8 Memory constitution (RAM character 6) ...
Page 8
... M35075-XXXFP SCREEN CONSTITUTION The screen lines and rows are determined from each address of the display RAM . The screen constitution is shown in Figure 10. Row Line 1 000 001 002 003 004 005 018 019 01A 01B 01C 01D ...
Page 9
... M35075-XXXFP DISPLAY RAM Address 000 to 11F 16 16 Register DA Status 0 Set the displayed ROM character code *RAM character is selected using the 8 bits from When C7 to C0=(11111110 1 is set and ...
Page 10
... M35075-XXXFP REGISTERS DESCRIPTION (1) Address 120 16 Register DA Status 0 Set division value (multiply value) of horizontal oscillation frequency. DIV0 DIV1 N1 = Σ division value (multiply value DIV2 1 0 DIV3 DIV4 DIV5 1 0 DIV6 DIV7 ...
Page 11
... M35075-XXXFP (2) Address 121 16 DA Register Status 0 P0 output (port P0). PTC0 0 1 BLNK0 output output (port P1). PTC1 signal output output (port P2). PTC2 2 1 Can not be used output (port P3). PTC3 signal output output (port P4). PTC4 4 1 Can not be used. ...
Page 12
... M35075-XXXFP (3) Address 122 16 DA Register Status 0 "L" output or negative polarity output (BLNK0 output). 0 PTD0 1 "H" output or positive polarity output (BLNK0 output). 0 "L" output or negative polarity output (R signal output). 1 PTD1 1 "H" output or positive polarity output (R signal output). 0 "L" output. ...
Page 13
... M35075-XXXFP (4) Address 123 16 DA Register Status 0 HP0 the horizontal display start location HP1 1 T: Period of display frequency 1 2007 settings are possible. 0 HP2 offset value differ for the setting of the register EXCK0 and 1 EXCK1. It shown below. 0 HP3 ...
Page 14
... M35075-XXXFP (5) Address 124 16 DA Register Status the vertical display start location, 0 VP0 Cycle with the horizonal synchronizing pulse 1 VP1 2047 settings are possible VP2 VP3 VP4 VP5 VP6 VP7 VP8 ...
Page 15
... M35075-XXXFP (6) Address 125 16 DA Register Status 0 The display modes of display screen inside n+1 line by DSPn (n=0 0 DSP0 to 11) 1 The display mode decided by the combination with registers BLK1 0 and BLK0 (address 129 1 DSP1 Settings are given below DSP2 BLK1 DSP3 ...
Page 16
... M35075-XXXFP (7) Address 126 16 DA Register Status 0 The vertical dot size for line n in the character dot lines (18 vertical 0 LIN2 lines) is set using LINn ( 17 Dot size can be selected between 2 types for each dot line. 1 LIN3 1 For dot size, see the below registers. Line 1 and lines can 0 be set independent of one another ...
Page 17
... M35075-XXXFP (8) Address 127 16 DA Register Status 0 The vertical dot size for line n in the character dot lines (18 vertical 0 LIN10 1 lines) is set using LINn ( 17). 0 Dot size can be selected between 2 types for each dot line. 1 LIN11 1 For dot size, see the below registers. Line 1 and lines can 0 be set independent of one another ...
Page 18
... M35075-XXXFP (9) Address 128 16 DA Register Status should be fixed to “0”. 6 TEST26 1 Can not be used should be fixed to “0”. ...
Page 19
... M35075-XXXFP (10) Address 129 16 DA Register Status Blanking of BLK0, BLK1 0 0 BCOL All raster blanking 1 Synchronize with the leading edge of horizontal synchronization B/F Synchronize with the trailing edge of horizontal synchronization not mask by VERT input signal 0 2 VMASK Mask by VERT input signal ...
Page 20
... M35075-XXXFP REGISTER SUPPLEMENTARY DESCRIPTION (1) Setting external clock input and display frequency mode Setting external clock input and display frequency mode (by use of EXCK0, EXCK1 (121 ), and DIV10 to DIV0 (120 16 explained here following. (a) When (EXCK1, EXCK0) = (0, 0) ......External clock mode 1 Fosc = 6 MHz ( ...
Page 21
... M35075-XXXFP (2) To set display frequency range Whenever setting display frequency (when EXCK1 = "0", EXCK0 = "1", or EXCK1 = "1", EXCK0 = "1"), always set the display frequency range in accordance with the display frequency. This range is set from DIVS0, DIVS1, DIVS2, RSEL0 and RSEL1 (address 121 ) ...
Page 22
... M35075-XXXFP DISPLAY FORM 1 M35075-XXXFP has the following four display forms. (1) ROM character blanking mode Character size : Blanking same as the character size. Border size : Blanking the background as a size from character. BLK0 BLK1 BCOL < ...
Page 23
... M35075-XXXFP (2) Shadow display When border display mode, if set SYAD (address 129 to "1", it change to shadow display mode. Border and shadow display are shown below. Set shadow display color by BR, BG and BB of display RAM or by register FR, FG and FB. Register SYAD(129 Fig.14 Border and shadow display Rev ...
Page 24
... M35075-XXXFP DISPLAY FORM 2 This IC can display both ROM character and RAM character at the same time. The display form is shown in Figure 15 and 16. (1) RAM character blanking mode BCOL 0 1 Note1: The part of the appointed color by BR, BG and BB of the display RAM changes that is not coloring. ...
Page 25
... M35075-XXXFP < Register BCOL = “0”, RBLK0 = “1”> (Note 1) RAM Character 12dots (Note 2) Scanning R,GorB output BLNK0 output Color setting ( RAM character setting) (ROM character setting display RAM : RAM character code No. Character color (Character unit) . BR, BG display RAM : ...
Page 26
... M35075-XXXFP Example of setting RAM character data For example : RAM character 0 Example of setting the RED bit code data DAF DAE DAD DAC DAB DAA DA9 DA8 Address (BS) (GS) (RS) (1) (2) (3) ( (1)200 16 (2)201 ...
Page 27
... M35075-XXXFP CHARACTER FONT Images are composed dot matrix, and characters can be linked vertically and horizontally with other characters to al- low the display the continuous symbols. Character code FF is fixed as a blank without background. 16 Therefore, cannot register a character font in this code. ...
Page 28
... M35075-XXXFP DATA INPUT EXAMPLE Data of display RAM and display control registers can be set by 2 the I C-BUS serial input function. Example of data setting is shown in Figure 19 (at EXCK0 = "1", EXCK1 = "0" setting). Address/data DAE DAD DAC DAB DAA DA9 DA8 DA7 DA6 DA5 DA4 DA3 DA2 DA1 DA0 ...
Page 29
... Microcomputer Note : Connect CS pin to VDD at the time of I Note 1: Use this 1% precision element Note 2: Use this 10% precision element Fig.21 Example of the M35075-XXXFP peripheral circuit (External synchronous. At EXCK1 = "0", EXCK0 = "1") Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 Horizontal synchronors signal (3V or 5V) ...
Page 30
... External clock Note : Connect CS pin to VDD at the time of I Note 1: Use this 1% precision element Note 2: Use this 10% precision element Fig.22 Example of the M35075-XXXFP peripheral circuit (External clock mode 2. At EXCK1 = "1", EXCK0 = "1") Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 ...
Page 31
... M35075-XXXFP DATA INPUT 1 (1) The16-bit communication function (a)Serial data should be input with the LSB first. (b)The address consists of 16 bits. (c)The data consists of 16 bits. CS SCK SIN LSB Address(16 bits) Fig.23 Serial input timing Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 (d)The 16 bits in the SCK after the CS signal has fallen are the address, and for succeeding input data, the address is incremented every 16 bits ...
Page 32
... M35075-XXXFP (2)Timing requirements Data input Symbol Parameter t (SCK) SCK width su(CS) CS setup time h(CS) CS hold time t su(SIN) SIN setup time t SIN hold time h(SIN) t word 1 word writing time su(CS) w(SCK) SCK t su(SIN) SIN CS SCK … Fig. 24 Serial input timing requirements Rev ...
Page 33
... M35075-XXXFP DATA INPUT 2 2 (1) I C-Bus communication function This IC has a built-in data transmission interface which utilizes 2 unidirectional buses. In communications, this IC functions as a slave reception device. _____ Must connect CS pin to “H” at the time of I cation use. The IC is synchronized with the serial clock (SCL) sent from the master device and receives the data (SDA) ...
Page 34
... M35075-XXXFP (2) Data input (Sequence) (a) Addresses are consists of 16 bits. (b) Data is consists of 16 bits. (c) Addresses and data are communicated in 8-bit units. Input the lower 8 bits before the upper 8 bits. Make input from the MSB side. (d) After the start state has been attained and the control byte (7CH) received, the next 16 bits (2 bytes) are for inputting the address ...
Page 35
... M35075-XXXFP (2) Timing requirements Data input Symbol Parameter f CLK Clock frequency t HIGH HIGH period of Clock t LOW LOW period of Clock t R SDA & SCL rise time t F SDA & SCL fall time t : STA Hold time at START status STA Set up time at START status ...
Page 36
... M35075-XXXFP ABSOLUTE MAXIMUM RATINGS Symbol Parameter V Supply voltage DD V Input voltage I V Output voltage O P Power dissipation d T Operating temperature opr T Storage temperature stg RECOMMENDED OPERATING CONDITIONS Parameter Symbol Supply voltage V DD "H" level input voltage AC, CS, HOR, VERT V IH SCK/SCL, SIN/SDA " ...
Page 37
... M35075-XXXFP ELECTRICAL CHARACTERISTICS 2 V Symbol Parameter V Supply voltage DD I Supply current DD V “H” level output voltage OH V “L” level output voltage Pull-up resistance AC External clock input width TCK Notes 1. The current from the IC must not exceed – 0.1 mA/port at any of the port pins (P0 to P7). ...
Page 38
... M35075-XXXFP NOTE FOR SUPPLYING POWER __ (1)Timing of power supplying to AC pin The internal circuit of M35075-XXXFP is reset when the level of __ the auto clear input pin AC is "L". This pin in hysteresis input with the pull-up resistor. __ The timing about power supplying of AC pin is shown in Figure 29. ...
Page 39
... M35075-XXXFP STANDARD ROM TYPE : M35075-001FP M35075-001FP is a standard ROM type of M35075-XXXFP. The character patterns are fixed to the contents of Figure 30 to 33. Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 ...
Page 40
... M35075-XXXFP Fig.30 M35075-001FP character patterns (1) Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 ...
Page 41
... M35075-XXXFP Fig.31 M35075-001FP character patterns (2) Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 ...
Page 42
... M35075-XXXFP Fig.32 M35075-001FP character patterns (3) Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 ...
Page 43
... M35075-XXXFP Fig.33 M35075-001FP character patterns (4) Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 ...
Page 44
... M35075-XXXFP PACKAGE OUTLINE Rev.1.10 Feb 13, 2006 page REJ03B0180-0110 ...
Page 45
... REVISION HISTORY Rev. Date Page 1.00 Mar 01, 2002 - First edition issued 1.10 Feb 13, 2006 P36 "RECOMMENDED OPERATING CONDITIONS" and "ELECTRICAL CHARACTERISTICS 1" are changed. P37 "ELECTRICAL CHARACTERISTICS 2" is changed. M35075-XXXFP Description Summary ...