74aup2g00 NXP Semiconductors, 74aup2g00 Datasheet - Page 14

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74aup2g00

Manufacturer Part Number
74aup2g00
Description
Low-power Dual 2-input Nand Gate
Manufacturer
NXP Semiconductors
Datasheet
NXP Semiconductors
14. Abbreviations
Table 11.
15. Revision history
Table 12.
74AUP2G00_2
Product data sheet
Acronym
CDM
CMOS
DUT
ESD
HBM
MM
TTL
Document ID
74AUP2G00_2
Modifications:
74AUP2G00_1
Abbreviations
Revision history
Release date
20070515
20060825
Description
Charged Device Model
Complementary Metal Oxide Semiconductor
Device Under Test
ElectroStatic Discharge
Human Body Model
Machine Model
Transistor-Transistor Logic
The format of this data sheet has been redesigned to comply with the new identity guidelines of
NXP Semiconductors.
Legal texts have been adapted to the new company name where appropriate.
Section 2
Changed: ESD HBM exceeds 5000 V.
“Features”:
Data sheet status
Product data sheet
Product data sheet
Rev. 02 — 15 May 2007
Change notice
-
-
Low-power dual 2-input NAND gate
74AUP2G00
Supersedes
74AUP2G00_1
-
© NXP B.V. 2007. All rights reserved.
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