at49bv6416c ATMEL Corporation, at49bv6416c Datasheet - Page 15

• Manufacturer Part Number: at49bv6416c
• Description: 64-megabit 4m X 16 Page Mode 2.7-volt Flash Memory
• Manufacturer: ATMEL Corporation

4. Command Definition Table
Notes:
3465D–FLASH–04/06
Command Sequence
Read
Chip Erase
Plane Erase
Sector Erase
Word Program
Dual Word Program
Erase/Program Suspend
Erase/Program Resume
Product ID Entry
Sector Softlock
Sector Hardlock
Sector Unlock
Read Status Register
Clear Status Register
Program Protection Register– Block B
Lock Protection Register – Sector B
Status of Sector B Protection
CFI Query
1. The DATA FORMAT shown for each bus cycle is as follows; I/O7 - I/O0 (Hex). I/O15 - I/O8 are don’t care. The ADDRESS
2. PA is the plane address (A21 - A20). Any address within a plane can be used.
3. SA = sector address. Any word address within a sector can be used to designate the sector address (see pages
4. The first bus cycle address should be the same as the word address to be programmed.
5. This fast programming option enables the user to program two words in parallel only when V
6. During the second bus cycle, the manufacturer code is read from address PA+00000H, the device code is read from address
7. The plane address should be the same during the first and second bus cycle.
8. The status register bits are output on I/O7 - I/O0.
9. Any address within the user programmable protection register region. Please see
10. For the AT49BV6416C, xxxx = 0000H. For the AT49BV6416CT, xxxx = 3F80H.
11. If data bit D1 is “0”, sector B is locked. If data bit D1 is “1”, sector B can be reprogrammed.
FORMAT shown for each bus cycle is as follows: A7 - A0 (Hex). Address A21 through A8 are don’t care.
details).
and Addr1, of the two words, D
turing purposes only.
PA+00001H, and the data in the protection register is read from addresses 000081H - 000088H.
page 16
(6)(7)
(5)
IN0
Cycles
Bus
and D
1
2
2
2
2
3
1
1
1
2
2
2
2
1
2
2
2
1
IN1
, must only differ in address A0. This command should be used during manufac-
xxxx
xxxx80
xxxx80
Addr
Addr0
Addr
SA
SA
SA
SA
PA
PA
PA
PA
(10)
xx
xx
xx
xx
xx
(2)
(2)
(2)
(2)
(3)
(3)
(3)
(3)
(4)
8x
(10)
(10)
1st Bus
Cycle
(9)
40/10
Data
FF
E0
B0
D0
C0
C0
21
22
20
90
60
60
60
70
50
90
98
xxxx
xxxx80
xxxx80
Addr
Addr0
Addr
SA
SA
SA
SA
Addr
Addr
PA
(10)
(3)
(3)
(3)
(3)
(7)
“Protection Register Addressing Table” on
(4)
8x
2nd Bus
(10)
(10)
Cycle
(9)
AT49BV6416C(T)
D
D
PP
FFFD
Data
OUT
D
OUT
D
D
D0
D0
D0
2F
D0
01
= 10V. The addresses, Addr0
IN0
IN
IN
(11)
(8)
Addr1
Addr
3rd Bus
Cycle
17
-
Data
D
20
IN1
for
15