at49bv642dt ATMEL Corporation, at49bv642dt Datasheet - Page 5

• Manufacturer Part Number: at49bv642dt
• Description: 64-megabit 4m X 16 3-volt Only Flash Memory
• Manufacturer: ATMEL Corporation

3.7.1
3.7.2
3.7.3
3.7.4
3631A–FLASH–04/06
Data Polling
Toggle Bit
Erase/Program Status Bit
VPP Status Bit
The AT49BV642D(T) features Data Polling to indicate the end of a program cycle. If the status
configuration register is set to a “00”, during a program cycle an attempted read of the last word
loaded will result in the complement of the loaded data on I/O7. Once the program cycle has
been completed, true data is valid on all outputs and the next cycle may begin. During a chip or
sector erase operation, an attempt to read the device will give a “0” on I/O7. Once the program
or erase cycle has completed, true data will be read from the device. Data Polling may begin at
any time during the program cycle. Please see
If the status bit configuration register is set to a “01”, the I/O7 status bit will be low while the
device is actively programming or erasing data. I/O7 will go high when the device has completed
a program or erase operation. Once I/O7 has gone high, status information on the other pins can
be checked.
The Data Polling status bit must be used in conjunction with the erase/program and V
bit as shown in the algorithm in
In addition to Data Polling, the AT49BV642D(T) provides another method for determining the
end of a program or erase cycle. During a program or erase operation, successive attempts to
read data from the memory will result in I/O6 toggling between one and zero. Once the program
cycle has completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit
may begin at any time during a program cycle. Please see
more details.
The toggle bit status bit should be used in conjunction with the erase/program and V
as shown in the algorithm in
The device offers a status bit on I/O5 that indicates whether the program or erase operation has
exceeded a specified internal pulse count limit. If the status bit is a “1”, the device is unable to
verify that an erase or a word program operation has been successfully performed. The device
may also output a “1” on I/O5 if the system tries to program a “1” to a location that was previ-
ously programmed to a “0”. Only an erase operation can change a “0” back to a “1”. If a program
(Sector Erase) command is issued to a protected sector, the protected sector will not be pro-
grammed (erased). The device will go to a status read mode and the I/O5 status bit will be set
high, indicating the program (erase) operation did not complete as requested. Once the
erase/program status bit has been set to a “1”, the system must write the Product ID Exit com-
mand to return to the read mode. The erase/program status bit is a “0” while the erase or
program operation is still in progress. Please see
The AT49BV642D(T) provides a status bit on I/O3 that provides information regarding the volt-
age level of the VPP pin. During a program or erase operation, if the voltage on the VPP pin is
not high enough to perform the desired operation successfully, the I/O3 status bit will be a “1”.
Once the V
mand to return to the read mode. On the other hand, if the voltage level is high enough to
perform a program or erase operation successfully, the V
see
“Status Bit Table” on page 10
PP
status bit has been set to a “1”, the system must write the Product ID Exit com-
Figures 3-3 and 3-4
Figures 3-1 and 3-2
for more details.
“Status Bit Table” on page 10
on
“Status Bit Table” on page 10
on
page
page
9.
PP
8.
“Status Bit Table” on page 10
status bit will output a “0”. Please
AT49BV642D(T)
for more details.
for more details.
PP
status bit
PP
status
for
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