is42sm16200c Integrated Silicon Solution, Inc., is42sm16200c Datasheet - Page 16

no-image

is42sm16200c

Manufacturer Part Number
is42sm16200c
Description
1m X 16bits X 2banks Low Power Synchronous Dram
Manufacturer
Integrated Silicon Solution, Inc.
Datasheet
IS42SM/RM/VM16200C
Advanced Information
Note :
1 H L
1. H: Logic High, L: Logic Low, X: Don't care, BA: Bank Address, AP: Auto Precharge.
i Hi h L L
i L
X D
't
BA B
k Add
AP A t P
h
2. All entries assume that CKE was active during the preceding clock cycle.
3. If both banks are idle and CKE is inactive, then in power down cycle
4. Illegal to bank in specified states. Function may be legal in the bank indicated by Bank Address,
depending on the state of that bank.
5. If both banks are idle and CKE is inactive, then Self Refresh mode.
6. Illegal if tRCD is not satisfied.
7. Illegal if tRAS is not satisfied.
8. Must satisfy burst interrupt condition.
9. Must satisfy bus contention, bus turn around, and/or write recovery requirements.
10. Must mask preceding data which don't satisfy tDPL.
11. Illegal if tRRD is not satisfied
12. Illegal for single bank, but legal for other banks in multi-bank devices.
13. Illegal for all banks.
14. Mode Register Set and Extended Mode Register Set is same command truth table except BA.
16
Rev. 00A | July 2010
www.issi.com
- dram@issi.com

Related parts for is42sm16200c