w25x16bv Winbond Electronics Corp America, w25x16bv Datasheet
w25x16bv
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w25x16bv Summary of contents
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... SERIAL FLASH MEMORY WITH 4KB SECTORS AND DUAL OUTPUT SPI The W25Q16BV is recommended for all new 16Mb designs. The W25X16BV is available for existing designs that require "25X" device ID for firmware compatibility. W25X16BV Publication Release Date: March 16, 2009 - 1- Preliminary -- Revision A ...
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... Reserved Bits 11.1.6 Status Register Protect (SRP) 11.1.7 Status Register Memory Protection 11.2 INSTRUCTIONS 11.2.1 Manufacturer and Device Identification 11.2.2 Instruction Set 11.2.3 Write Enable (06h) 11.2.4 Write Disable (04h) ......................................................................................................... 4 .............................................................................. 5 .................................................................................. 5 ...................................................................................... 6 ....................................................................................... 7 ............................................................................................ 7 ............................................................................................................... 8 ............................................................................................................ 8 ................................................................................................. 8 ......................................................................................................... 8 ............................................................................................................... 8 .......................................................................................................... 8 ..................................................................................... 8 ................................................................................................. 10 ....................................................................................................... 10 ....................................................................................................................10 ............................................................................................................10 ...............................................................................................................10 .................................................................................................. 11 ..................................................................................................11 ................................................................................... 12 .................................................................................................... 12 ............................................................................................12 ..............................................................................12 .....................................................................................12 ...............................................................................................................12 ......................................................................................13 ..............................................................................13 ........................................................................................................... 14 .........................................................................14 ...............................................................................................................15 ........................................................................................................16 ....................................................................................................... W25X16BV ............................... 6 ...
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... PDIP 300-mil (Package Code DA) 8-Pad WSON 6x5mm (Package Code ZP) 13.4 13.5 16-Pin SOIC 300-mil (Package Code SF) 14. ORDERING INFORMATION 15. REVISION HISTORY ................................................................................................................ 47 ..........................................................................................17 ..........................................................................................18 ...........................................................................................................19 ...........................................................................................................20 .......................................................................................21 ...................................................................................................22 .....................................................................................................23 .............................................................................................24 ......................................................................................................25 .............................................................................................26 ......................................................................................................27 .....................................................................28 .........................................................................30 ..........................................................................................................31 ......................................................................................... 32 .......................................................................................... 32 ......................................................................................................... 32 .............................................................. 33 ........................................................................................ 34 ........................................................................................ 35 ........................................................................................ 36 ........................................................................... 37 ..................................................................................................... 38 .................................................................................................... 39 ...................................................................... 39 ...................................................................... 40 ...................................................................... 41 .................................................................. 42 .................................................................... 44 .................................................................................................... 45 Publication Release Date: March 16, 2009 - 3 - W25X16BV Preliminary -- Revision A ...
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... The devices operate on a single 2.7V to 3.6V power supply with current consumption as low as 4mA active and 1µA for power-down. All devices are offered in space-saving packages. The W25X16BV array is organized into 8,192 programmable pages of 256-bytes each 256 bytes can be programmed at a time using the Page Program instruction. Pages can be erased in groups of 16 (sector erase), groups of 128 (32KB block erase), groups of 256 (block erase) or the entire chip (chip erase) ...
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... PIN CONFIGURATION SOIC 150 / 208-MIL Figure 1a. W25X16BV Pin Assignments, 8-pin SOIC 150 / 208-mil (Package Code SN & SS) 4. PAD CONFIGURATION WSON 6X5-MM Figure 1b. W25X16BV Pad Assignments, 8-pad WSON 6X5-mm (Package Code ZP) W25X16BV Publication Release Date: March 16, 2009 - 5 - Preliminary -- Revision A ...
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... PAD CONFIGURATION PDIP 300-MIL Figure 1c. W25X16BV Pin Assignments, 8-pin PDIP (Package Code DA) 6. PIN DESCRIPTION SOIC 150 / 208-MIL, PDIP 300-MIL, WSON 6X5-MM PIN NO. PIN NAME 1 / /WP 4 GND 5 DIO 6 CLK 7 /HOLD 8 VCC I/O FUNCTION I Chip Select Input O Data Output I Write Protect Input ...
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... PIN CONFIGURATION SOIC 300-MIL Figure 1d. W25X16BV Pin Assignments, 16-pin SOIC 300-mil (Package Code SF) 8. PIN DESCRIPTION SOIC 300-MIL PIN NO. PIN NAME 1 /HOLD 2 VCC 3 N/C 4 N/C 5 N/C 6 N /WP 10 GND 11 N/C 12 N/C 13 N/C 14 N/C 15 DIO 16 CLK I/O FUNCTION I Hold Input Power Supply No Connect No Connect No Connect ...
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... Package Types W25X16BV is offered in an 8-pin plastic 150-mil or 208-mil width SOIC (package code SN & SS) and 6x5-mm WSON (package code ZP) as shown in figure 1a, and 1b, respectively. The 300-mil 8-pin PDIP is another option of package selections (Figure 1c). The W25X16BV is also offered in a 16-pin plastic 300-mil width SOIC (package code SF) as shown in figure 1d. Package diagrams and dimensions are illustrated at the end of this datasheet ...
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... Latch / Counter Latch / Counter Beginning Beginning Page Address Page Address Data Data Byte Address Byte Address Latch / Counter Latch / Counter Figure 2. W25X16BV Block Diagram Publication Release Date: March 16, 2009 - 9 - W25X16BV 1FFFFFh 1FFFFFh • • Block 31 (64KB) Block 31 (64KB) • • 1F00FFh 1F00FFh • ...
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... All other operations use the standard SPI interface with single output signal. 10.1.3 Hold Function The /HOLD signal allows the W25X16BV operation to be paused while it is actively selected (when /CS is low). The /HOLD function may be useful in cases where the SPI data and clock signals are shared with other devices ...
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... Hardware write protection using Status Register and /WP pin. Write Protection using Power-down instruction. Upon power- power-down the W25X16BV will maintain a reset condition while VCC is below the threshold value (See Power-up Timing and Voltage Levels and Figure 21). While reset, all WI operations are disabled and no instructions are recognized ...
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... Status register bit location S6 is reserved for future use. Current devices will read 0 for this bit location recommended to mask out the reserved bit when testing the Status Register. Doing this will ensure compatibility with future devices characteristics). All, none or a portion of the memory W25X16BV ...
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... Note don’t care Figure 3. Status Register Bit Locations W25X16BV (16M-BIT) MEMORY PROTECTION ADDRESSES NONE NONE 31 1F0000h - 1FFFFFh 1E0000h - 1FFFFFh 1C0000h - 1FFFFFh 180000h - 1FFFFFh 100000h - 1FFFFFh 0 000000h - 00FFFFh 0 and 1 000000h - 01FFFFh 0 thru 3 ...
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... INSTRUCTIONS The instruction set of the W25X16BV consists of fifteen basic instructions that are fully controlled through the SPI bus (see Instruction Set table). Instructions are initiated with the falling edge of Chip Select (/CS). The first byte of data clocked into the DIO input provides the instruction code. Data on the DIO input is sampled on the rising edge of clock with most significant bit (MSB) first ...
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... A7–A0 A15–A8 A7–A0 A15–A8 A7–A0 dummy dummy (ID7-ID0) dummy 00h (M7-M0) (ID15-ID8) (ID7-ID0) Memory Capacity Type Publication Release Date: March 16, 2009 - 15 - W25X16BV BYTE 6 N-BYTES (2) (Next byte) continuous (Next Byte) (D7–D0) continuous I/O = (one byte (D6,D4,D2,D0) per 4 clocks continuous) (D7,D5,D3,D1 256 (Next byte) ...
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... DIO pin and then driving /CS high. Note that the WEL bit is automatically reset after Power-up and upon completion of the Write Status Register, Page Program, Sector Erase, Block Erase and Chip Erase instructions. Figure 5. Write Disable Instruction Sequence Diagram - 16 - W25X16BV ...
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... Register cycle is in progress. This allows the BUSY status bit to be checked to determine when the cycle is complete and if the device can accept another instruction. The Status Register can be read continuously, as shown in Figure 6. The instruction is completed by driving /CS high. Figure 6. Read Status Register Instruction Sequence Diagram Publication Release Date: March 16, 2009 - 17 - Preliminary -- Revision A W25X16BV ...
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... When the SRP pin is set the Write Status Register instruction is locked out while the /WP pin is low. When the /WP pin is high the Write Status Register instruction is allowed. Figure 7. Write Status Register Instruction Sequence Diagram (See AC Characteristics). While W25X16BV ...
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... Erase, Program or Write cycle is in process (BUSY=1) the instruction is ignored and will not have any effects on the current cycle. The Read Data instruction allows clock rates from D. maximum of f (see AC Electrical Characteristics). R Figure 8. Read Data Instruction Sequence Diagram Publication Release Date: March 16, 2009 - 19 - Preliminary -- Revision A W25X16BV ...
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... The dummy clocks allow the devices internal circuits additional time for setting up the initial address. During the dummy clocks the data value on the DIO pin is a “don’t care”. (see AC Electrical Characteristics). This is accomplished by adding R Figure 9. Fast Read Instruction Sequence Diagram - 20 - W25X16BV ...
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... DO and DIO, instead of just DO. This allows data to be transferred from the W25X16BV at twice the rate of standard SPI devices. The Fast Read Dual Output instruction is ideal for quickly downloading code from Flash to RAM upon power-up or for applications that cache code-segments to RAM for execution ...
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... After the Page Program cycle has finished the Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Page Program instruction will not be executed if the addressed page is protected by the Block Protect (BP2, BP1, and BP0) bits (see Status Register Memory Protection table). Figure 11. Page Program Instruction Sequence Diagram - 22 - W25X16BV ...
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... Erase instruction will not be executed if the addressed page is protected by the Block Protect (TB, BP2, BP1, and BP0) bits (see Status Register Memory Protection table). Figure 12. Sector Erase Instruction Sequence Diagram (See AC Characteristics). While the Sector SE Publication Release Date: March 16, 2009 - 23 - Preliminary -- Revision A W25X16BV ...
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... Write Enable Latch (WEL) bit in the Status Register is cleared to 0. The Block Erase instruction will not be executed if the addressed page is protected by the Block Protect (SEC, TB, BP2, BP1, and BP0) bits (see Status Register Memory Protection table). Figure 13. 32KB Block Erase Instruction Sequence Diagram 1 (See AC Characteristics). While the Block W25X16BV ...
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... Block Protect (TB, BP2, BP1, and BP0) bits (see Status Register Memory Protection table). Figure 14. Block Erase Instruction Sequence Diagram (See AC Characteristics). While the Block BE Publication Release Date: March 16, 2009 - 25 - Preliminary -- Revision A W25X16BV ...
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... Latch (WEL) bit in the Status Register is cleared to 0. The Chip Erase instruction will not be executed if any page is protected by the Block Protect (BP2, BP1, and BP0) bits (see Status Register Memory Protection table). Figure 15. Chip Erase Instruction Sequence Diagram (See AC Characteristics). While the Chip Erase cycle W25X16BV ...
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... Down state a useful condition for securing maximum write protection. The device always powers-up in the normal operation with the standby current of ICC1. Figure 16. Deep Power-down Instruction Sequence Diagram (See AC Characteristics). While in the power-down state only the Publication Release Date: March 16, 2009 - 27 - W25X16BV Preliminary -- Revision A ...
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... The Device ID bits are then shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in figure 17. The Device ID values for the W25X16BV are listed in Manufacturer and Device Identification table. The Device ID can be read continuously. The instruction is completed by driving /CS high ...
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... Figure 18. Release Power-down / Device ID Instruction Sequence Diagram - 29 - W25X16BV Publication Release Date: March 16, 2009 Preliminary -- Revision A ...
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... Device ID are shifted out on the falling edge of CLK with most significant bit (MSB) first as shown in figure 19. The Device ID values for the W25X16BV are listed in Manufacturer and Device Identification table. If the 24-bit address is initially set to 000001h the Device ID will be read first and then followed by the Manufacturer ID ...
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... JEDEC ID (9Fh) For compatibility reasons, the W25X16BV provides several instructions to electronically determine the identity of the device. The Read JEDEC ID instruction is compatible with the JEDEC standard for SPI compatible serial memories that was adopted in 2003. The instruction is initiated by driving the /CS pin low and shifting the instruction code “9Fh”. The ...
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... Lead Temperature Electrostatic Discharge Voltage Notes: 1. Specification for W25X16BV is preliminary. See preliminary designation at the end of this document. 2. This device has been designed and tested for the specified operation ranges. Proper operation outside of these levels is not guaranteed. Exposure to absolute maximum ratings may affect device reliability ...
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... Time Delay Before Write Instruction Write Inhibit Threshold Voltage Note: 1. These parameters are characterized only. SYMBOL t (1) VSL t (1) PUW V (1) WI Figure 21. Power-up Timing and Voltage Levels Publication Release Date: March 16, 2009 - 33 - W25X16BV SPEC UNIT MIN MAX Preliminary -- Revision A µ ...
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... (2) OUT /CS = VCC, VIN = GND or VCC /CS = VCC, VIN = GND or VCC C = 0.1 VCC / 0.9 VCC DO = Open C = 0.1 VCC / 0.9 VCC DO = Open C = 0.1 VCC / 0.9 VCC DO = Open /CS = VCC /CS = VCC /CS = VCC /CS = VCC –100 µ W25X16BV SPEC MIN TYP MAX 6 8 ±2 ± <1 5 4/5 6/7.5 6/7 9/10 10/11 15/16 – ...
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... Note: 1. Output Hi-Z is defined as the point where data out is no longer driven. SYMBOL Figure 22. AC Measurement I/O Waveform Publication Release Date: March 16, 2009 - 35 - W25X16BV SPEC UNIT MIN MAX 0.2 VCC to 0.8 VCC V 0.3 VCC to 0.7 VCC V 0.5 VCC to 0.5 VCC V Preliminary -- Revision A ...
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... DVCH DSU CHDX CHSH t 5 SHCH t t 10/50 SHSL CSH ( SHQZ DIS t t CLQV CLQX W25X16BV SPEC UNIT TYP MAX 80 MHz 104 MHz 50 MHz ns ns V/ns V/ Continued – next page ...
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... W (4) t BP1 (4) t BP2 (typical) and BPN BP1 + BP2 * N Publication Release Date: March 16, 2009 - 37 - W25X16BV SPEC ALT MIN TYP MAX 100 2 200 120 ...
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... Serial Output Timing 12.9 Input Timing 12.10 Hold Timing - 38 - W25X16BV ...
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... BSC 0.71 1.27 0.015 --- --- 0.10 --- Publication Release Date: March 16, 2009 - 39 - W25X16BV INCHES TYP. MAX 0.063 0.068 --- 0.009 0.057 --- 0.016 0.020 0.008 0.0098 0.191 0.195 0.236 0.244 0.154 0.157 0.050 BSC 0.028 0.050 8 o --- --- 0.004 Preliminary -- Revision A ...
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... Formed leads shall be planar with respect to one another within .0004 inches at the seating plane. MILLIMETERS INCHES MIN MAX MIN 1.75 2.16 0.069 0.05 0.25 0.002 1.70 1.91 0.067 0.35 0.48 0.014 0.19 0.25 0.007 5.18 5.38 0.204 7.70 8.10 0.303 5.18 5.38 0.204 1.27 BSC 0.050 BSC 0.50 0.80 0.020 --- 0.10 --- - 40 - W25X16BV MAX 0.085 0.010 0.075 0.019 0.010 0.212 0.319 0.212 0.031 8 o 0.004 ...
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... Publication Release Date: March 16, 2009 - 41 - W25X16BV INCHES TYP. MAX --- 0.210 --- --- 0.130 0.135 0.018 0.022 0.060 0.064 0.010 0.014 0.365 0.400 0.300 0.310 0.250 0.255 0.100 0.110 0.130 ...
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... MILLIMETERS MIN TYP. MAX 0.70 0.75 0.80 0.0276 0.00 0.02 0.05 0.0000 0.55 0.19 .0.20 0.25 0.0075 0.36 0.40 0.48 0.0138 5.90 6.00 6.10 0.2320 3.30 3.40 3.50 0.1299 4.90 5.00 5.10 0.1930 4.20 4.30 4.40 0.1653 1.27 BSC 0.20 0.0080 0.50 0.60 0.75 0.0197 - 42 - W25X16BV INCHES MIN TYP. MAX 0.0295 0.0315 0.0008 0.0019 0.0126 0.0080 0.0098 0.0157 0.0190 0.2360 0.2400 0.1338 0.1377 0.1970 0.2010 0.1692 0.1732 0.0500 BSC 0.0236 0.0295 ...
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... The metal pad area on the bottom center of the package is connected to the device ground (GND pin). Avoid placement of exposed PCB vias under the pad. INCHES TYP. MAX MIN 3.40 0. 4.30 0. 6.00 0. 0. W25X16BV TYP . MAX Publication Release Date: March 16, 2009 Preliminary -- Revision A ...
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... Dimensions D and E1 do not include mold flash protrusions and should be measured from the bottom of the package. MILLIMETERS INCHES MIN MAX MIN 2.36 2.64 0.093 0.10 0.30 0.004 0.33 0.51 0.013 0.18 0.28 0.007 10.08 10.49 0.397 10.01 10.64 0.394 7.39 7.59 0.291 1.27 BSC 0.050 BSC 0.39 1.27 0.015 --- 0.076 --- - 44 - W25X16BV MAX 0.104 0.012 0.020 0.011 0.413 0.419 0.299 0.050 8 o 0.003 ...
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... Only the 2 letter is used for the part marking, package type ZP is not used for the part marking. (1) W 25X xxB 8-pad WSON 6x5mm DA = 8-pin PDIP 300mil SF = 16-pin SOIC 300-mil Publication Release Date: March 16, 2009 - 45 - W25X16BV ( Preliminary -- Revision A ...
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... Valid Part Numbers and Top Side Marking: The following table provides the valid part numbers for the W25X16BV SpiFlash Memories. Please contact Winbond for specific availability by density and package type. Winbond SpiFlash memories use an 12-digit Product Number for ordering. However, due to limited space, the Top Side Marking on all packages use an abbreviated 10-digit number ...
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... Information in this document is provided solely in connection with Winbond products. Winbond reserves the right to make changes, corrections, modifications or improvements to this document and the products and services described herein at any time, without notice. All New create preliminary. Publication Release Date: March 16, 2009 - 47 - W25X16BV DESCRIPTION ranteed. Winbond Preliminary -- Revision A ...