m28w640hcb STMicroelectronics, m28w640hcb Datasheet
m28w640hcb
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m28w640hcb Summary of contents
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... Electronic signature – Manufacturer code: 20h – Top device code, M28W640HCT: 8848h – Bottom device code, M28W640HCB: 8849h January 2008 This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to change without notice. ...
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... Automatic Standby . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 3.6 Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 4 Command interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.1 Read Memory Array command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.2 Read Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.3 Read Electronic Signature command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 4.4 Read CFI Query command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.5 Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 4.6 Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.7 Double Word Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 4.8 Quadruple Word Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.9 Clear Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 2/72 M28W640HCT, M28W640HCB ...
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... M28W640HCT, M28W640HCB 4.10 Program/Erase Suspend command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 4.11 Program/Erase Resume command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.12 Protection Register Program command . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.13 Block Lock command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 4.14 Block Unlock command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 4.15 Block Lock-down command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 5 Block locking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.1 Reading a block’s lock status . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.2 Locked state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.3 Unlocked state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.4 Lock-down state . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.5 Locking operations during Erase Suspend . . . . . . . . . . . . . . . . . . . . . . . . 26 6 Status Register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 6 ...
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... Contents Appendix C Flowcharts and pseudocodes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59 Appendix D Command interface and Program/Erase controller state Revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 71 4/72 M28W640HCT, M28W640HCB ...
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... Table 21. TFBGA48 6. ball array, 0.75 mm pitch, package mechanical data . . 43 Table 22. Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 44 Table 23. Top boot block addresses, M28W640HCT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 Table 24. Bottom boot block addresses, M28W640HCB . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 Table 25. Query structure overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53 Table 26. CFI query identification string . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 54 Table 27. CFI query system interface information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55 Table 28 ...
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... Quadruple Word Program flowchart and pseudocode . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61 Figure 18. Program Suspend & Resume flowchart and pseudocode . . . . . . . . . . . . . . . . . . . . . . . . . 62 Figure 19. Erase flowchart and pseudocode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63 Figure 20. Erase Suspend & Resume flowchart and pseudocode . . . . . . . . . . . . . . . . . . . . . . . . . . . 64 Figure 21. Locking operations flowchart and pseudocode Figure 22. Protection Register Program flowchart and pseudocode . . . . . . . . . . . . . . . . . . . . . . . . . . 66 6/72 M28W640HCT, M28W640HCB ...
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... M28W640HCT, M28W640HCB 1 Description The M28W640HCT and M28W640HCB are 64 Mbit (4 Mbit x 16) non-volatile Flash memories that can be erased electrically at block level and programmed in-system on a word-by-word basis using provided to speed up customer programming. The devices feature an asymmetrical blocked architecture. They have an array of 135 blocks: 8 parameter blocks of 4 Kwords and 127 main blocks of 32 Kwords ...
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... Description Address inputs Data input/output Chip Enable Output Enable Write Enable Reset Write Protect Power supply Optional supply voltage for fast program & erase Ground Not connected internally M28W640HCT, M28W640HCB 16 DQ0-DQ15 AI09903b Direction Inputs I/O Input Input Input Input Input Power supply ...
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... M28W640HCT, M28W640HCB Figure 2. TSOP connections 1. All V pins must be connected to the power supply All V pins must be connected to the ground. SS A15 1 48 A14 A13 A12 A11 A10 A9 A8 A21 A20 M28W640HCT M28W640HCB A19 A18 A17 ...
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... SS 10/ A11 A10 W A12 A9 A21 DQ14 DQ5 DQ11 DQ15 DQ6 DQ12 DQ7 DQ13 DQ4 M28W640HCT, M28W640HCB A19 A7 A4 A18 A17 A5 A2 A20 DQ2 DQ8 E A0 DQ3 DQ9 DQ0 ...
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... M28W640HCT, M28W640HCB Figure 4. Block addresses M28W640HCT Top boot block addresses 3FFFFF 4 Kwords 3FF000 3F8FFF 4 Kwords 3F8000 3F7FFF 32 Kwords 3F0000 00FFFF 32 Kwords 008000 007FFF 32 Kwords 000000 1. Also see Appendix Figure 5. Protection register memory map 8Ch 85h 84h 81h 80h Total Kword blocks ...
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... Reset the memory is deselected, the outputs are high IH , the lock-down is enabled and the protection status of the block IL , the lock-down is disabled and the block IH Table 7: Read Protection Register and Lock M28W640HCT, M28W640HCB the device is in active IH Register). ...
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... M28W640HCT, M28W640HCB 2.7 Reset (RP) The Reset input provides a hardware reset of the memory. When Reset memory is in reset mode: the outputs are high impedance and the current consumption is minimized. After Reset all blocks are in the locked state. When Reset normal operation. Exiting reset mode the device enters read array mode, but a negative transition of Chip Enable or a change of the address is required to ensure valid data outputs ...
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... The power consumption is reduced to the standby level and the outputs are set 14/72 in order to perform a read operation. The Chip Enable input IL interface). See Figure 8: Read AC Figure 11, Write AC waveforms, and M28W640HCT, M28W640HCB Table 2: Bus operations, waveforms, and Table 16: Read AC Figure 9: Page Read AC with Output IL ...
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... M28W640HCT, M28W640HCB to high impedance, independently from the Output Enable or Write Enable inputs. If Chip Enable switches to V mode when finished. 3.5 Automatic Standby Automatic standby provides a low power consumption state during Read mode. Following a read operation, the device enters automatic standby after 150 ns of bus inactivity even if Chip Enable is Low, V will still output data if a bus read operation is in progress ...
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... Protection and Lock Register. See Tables 5, 16/72 Table 3: Command Table 31: Write state machine is lower than V DD LKO M28W640HCT, M28W640HCB codes, for a summary of the commands and current/next, for a summary of the command . Command sequences must be followed Table 11: Status Register bits, for details on 6 and 7 for the valid address ...
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... M28W640HCT, M28W640HCB Table 3. Command codes Hex code 01h 10h 20h 2Fh 30h 40h 50h 56h 60h 70h 90h 98h B0h C0h D0h FFh 4.4 Read CFI Query command The Read Query command is used to read data from the common Flash interface (CFI) memory area, allowing programming equipment or applications to automatically match their interface to the characteristics of the device ...
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... As data integrity cannot be guaranteed when the IL Figure 15: Program flowchart and is not PPH . As data integrity cannot be guaranteed when the IL Figure 16: Double Word Program flowchart and pseudocode M28W640HCT, M28W640HCB pseudocode, for a suggested flowchart for Table 8: cycles. pseudocode, for the flowchart for using . for the cycles. ...
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... M28W640HCT, M28W640HCB 4.8 Quadruple Word Program command This feature is offered to improve the programming throughput, writing a page of four adjacent words in parallel.The four words must differ only for the addresses A0 and A1. Programming should not be attempted when V Five bus write cycles are necessary to issue the Quadruple Word Program command: The first bus cycle sets up the Quadruple Word Program command ...
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... They are cleared by a Blocks Unlock command. Refer to the section, Block Locking, for a detailed explanation. 20/72 Figure 18: Program Suspend & Resume flowchart and map). Attempting to program a previously protected shows the protection status after issuing a Block Lock command. M28W640HCT, M28W640HCB pseudocode, and pseudocode, for flowcharts for using ...
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... M28W640HCT, M28W640HCB 4.14 Block Unlock command The Block Unlock command is used to unlock a block, allowing the block to be programmed or erased. Two Bus Write cycles are required to issue the Block Unlock command: The first bus cycle sets up the Block Unlock command The second Bus Write cycle latches the block address. ...
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... Write PA1 PD1 Write PA2 PD2 56h Write PA1 PD1 Write PA2 PD2 Write PA3 PD3 Write PA4 PD4 50h B0h D0h 60h Write BA 01h 60h Write BA D0h 60h Write BA 2Fh C0h Write PRA PRD 6 and 7. M28W640HCT, M28W640HCB 4th cycle 5th cycle ...
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... M28W640HCT, M28W640HCB Table 5. Read electronic signature Code Device Manufacturer code M28W640HCT Device code M28W640HCB Table 6. Read block lock signature Block status Locked block Unlocked block Locked-down block 1. A locked-down block can be locked ‘DQ0 = 1’ or unlocked ‘DQ0 = 0’; see Table 7 ...
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... V ± ± ± ± ± 100,000 M28W640HCT, M28W640HCB Unit Typ Max 10 200 µs 10 200 µs 10 200 µs (1) 0.16/0. 0. (1) 0.02/0. 0. ...
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... M28W640HCT, M28W640HCB 5 Block locking The M28W640HCT and M28W640HCB feature an instant, individual block locking scheme that allows any block to be locked or unlocked with no latency. This locking scheme has three levels of protection: Lock/unlock - this first level allows software-only control of block locking Lock-down - this second level requires hardware interaction before locking can be changed ≤ ...
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... Program/Erase controller state, for detailed information on which commands are valid during Erase Suspend. Table 9. Block Lock status Block Lock configuration Block is Unlocked Block is Locked-down 26/72 ) the Lock-down function is disabled (1,1,1) and Locked-down IH Item Block is Locked M28W640HCT, M28W640HCB ), the blocks in IL Appendix Address Data LOCK DQ0=0 xx002 DQ0=1 DQ1=1 D, ...
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... M28W640HCT, M28W640HCB Table 10. Protection status Current Protection status (WP, DQ1, DQ0) Program/Erase Current state 1,0,0 (2) 1,0,1 1,1,0 1,1,1 0,0,0 (2) 0,0,1 0,1,1 1. The lock status is defined by the write protect pin and by DQ1 (‘1’ for a locked-down block) and DQ0 (‘1’ for a locked block) as read in the Read Electronic Signature command with ...
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... Suspend mode. When a Program/Erase Resume command is issued the Erase Suspend Status bit returns Low. 28/72 command. To output the contents, the Status Register is latched on . Either Chip Enable or Output Enable must be IH Table 11: Status Register M28W640HCT, M28W640HCB Section 4.2: bits. Refer to ...
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... M28W640HCT, M28W640HCB 6.3 Erase status (bit 5) The Erase status bit can be used to identify if the memory has failed to verify that the block has erased correctly. When the Erase status bit is High (set to ‘1’), the Program/Erase controller has applied the maximum number of pulses to the block and still failed to verify that the block has erased correctly ...
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... Program status Program Suspend status 1 Block Protection status 0 Reserved 1. Logic level '1' is High, '0' is Low. 30/72 pseudocodes, for using the Status Register. (1) Name Logic level status M28W640HCT, M28W640HCB Definition '1' Ready '0' Busy '1' Suspended '0' In progress or completed '1' Erase error '0' Erase success '1' Program error '0' ...
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... M28W640HCT, M28W640HCB 7 Maximum ratings Stressing the device above the rating listed in cause permanent damage to the device. These are stress ratings only and operation of the device at these or any other conditions above those indicated in the operating sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability ...
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... Figure 6. AC measurement I/O waveform Figure 7. AC measurement load circuit 32/72 conditions. Designers should check that the Parameter ) DEVICE UNDER TEST 0.1 µ includes JIG capacitance M28W640HCT, M28W640HCB M28W640HCT, M28W640HCB 70 ns Min Max 2.7 3.6 – DD/2 AI00610b kΩ ...
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... M28W640HCT, M28W640HCB Table 14. Capacitance Symbol C Input capacitance IN C Output capacitance OUT 1. Sampled only, not 100% tested. (1) Parameter Test condition OUT DC and AC parameters Min Max Unit 33/72 ...
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... PP1 operations) Program voltage (program or erase V PPH operations) Program voltage (program and erase lock- V PPLK out) V supply voltage (Program and Erase DD V LKO lock-out) 34/72 M28W640HCT, M28W640HCB Test condition Min 0 V ≤ V ≤ ≤ ≤ OUT ...
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... M28W640HCT, M28W640HCB Figure 8. Read AC waveforms A0-A21 E G DQ0- DQ15 Table 16. Read AC characteristics Symbol Alt t t AVAV AVQV ACC ( AXQX OH ( EHQX OH ( EHQZ HZ ( ELQV CE ( ELQX LZ ( GHQX OH ( GHQZ DF ( GLQV ...
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... DC and AC parameters Figure 9. Page Read AC waveforms 36/72 M28W640HCT, M28W640HCB ...
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... M28W640HCT, M28W640HCB Figure 10. Write AC waveforms, Write Enable controlled DC and AC parameters 37/72 ...
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... Write Enable High to Chip Enable Low Write Enable High to Output Enable Low Write Enable High to Write Enable Low Write Enable Low to Write Enable High WP Write Protect High to Write Enable High is seen as a logic input (V < 3.6 V). PP M28W640HCT, M28W640HCB M28W640HCT, M28W640HCB 70 ns Unit Min 70 ns Min ...
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... M28W640HCT, M28W640HCB Figure 11. Write AC waveforms, Chip Enable controlled DC and AC parameters 39/72 ...
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... PP Data Valid to Write Protect Low V High to Chip Enable High VPS PP t Write Enable Low to Chip Enable Low CS Write Protect High to Chip Enable High is seen as a logic input (V < 3.6 V). PP M28W640HCT, M28W640HCB M28W640HCT, M28W640HCB 70 ns Unit Min 70 ns Min 45 ns Min 45 ns ...
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... M28W640HCT, M28W640HCB Figure 12. Power-up and Reset AC waveforms Table 19. Power-up and Reset AC characteristics Symbol t PHWL Reset High to Write Enable Low, t PHEL Chip Enable Low, Output Enable Low t PHGL (1)(2) t Reset Low to Reset High PLPH (3) t Supply voltages High to Reset High VDHPH 1 ...
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... Typ Min Max 1.20 0.10 0.05 0.15 1.00 0.95 1.05 0.22 0.17 0.27 0.10 0.21 0.10 12.00 11.90 12.10 20.00 19.80 20.20 18.40 18.30 18.50 0.50 – – 0.60 0.50 0.70 0.80 3° 0° 5° M28W640HCT, M28W640HCB TSOP-G inches Typ Min 0.004 0.002 0.039 0.037 0.009 0.007 0.004 0.472 0.468 0.787 0.779 0.724 0.720 0.020 – 0.024 0.020 0.031 3° 0° A Max 0.047 ...
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... M28W640HCT, M28W640HCB Figure 14. TFBGA48 6. ball array, 0.75 mm pitch, bottom view package outline E BALL "A1" 1. Drawing is not to scale. Table 21. TFBGA48 6. ball array, 0.75 mm pitch, package mechanical data Symbol ddd ...
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... F = ECOPACK® package, tape & reel packing Note: Devices are shipped from the factory with the memory content bits erased to ’1’. For a list of available options (speed, package, etc.) or for further information on any aspect of this device, please contact the ST Sales Office nearest to you. 44/72 M28W640HCT, M28W640HCB M28W640HCT ...
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... M28W640HCT, M28W640HCB Appendix A Block address tables Table 23. Top boot block addresses, M28W640HCT # Size (Kword ...
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... M28W640HCT, M28W640HCB Address range 330000-337FFF 328000-32FFFF 320000-327FFF 318000-31FFFF 310000-317FFF 308000-30FFFF 300000-307FFF 2F8000-2FFFFF 2F0000-2F7FFF 2E8000-2EFFFF 2E0000-2E7FFF 2D8000-2DFFFF 2D0000-2D7FFF 2C8000-2CFFFF 2C0000-2C7FFF 2B8000-2BFFFF 2B0000-2B7FFF 2A8000-2AFFFF 2A0000-2A7FFF 298000-29FFFF 290000-297FFF 288000-28FFFF 280000-287FFF 278000-27FFFF ...
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... M28W640HCT, M28W640HCB Table 23. Top boot block addresses, M28W640HCT (continued 100 101 Size (Kword ...
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... M28W640HCT, M28W640HCB Address range 100000-107FFF 0F8000-0FFFFF 0F0000-0F7FFF 0E8000-0EFFFF 0E0000-0E7FFF 0D8000-0DFFFF 0D0000-0D7FFF 0C8000-0CFFFF 0C0000-0C7FFF 0B8000-0BFFFF 0B0000-0B7FFF 0A8000-0AFFFF 0A0000-0A7FFF 098000-09FFFF 090000-097FFF 088000-08FFFF 080000-087FFF 078000-07FFFF 070000-077FFF 068000-06FFFF 060000-067FFF 058000-05FFFF 050000-057FFF 048000-04FFFF ...
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... M28W640HCT, M28W640HCB Table 24. Bottom boot block addresses, M28W640HCB # 134 133 132 131 130 129 128 127 126 125 124 123 122 121 120 119 118 117 116 115 114 113 112 111 110 109 108 107 106 105 104 103 102 ...
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... Block address tables Table 24. Bottom boot block addresses, M28W640HCB (continued 50/72 Size (Kword ...
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... M28W640HCT, M28W640HCB Table 24. Bottom boot block addresses, M28W640HCB (continued Size (Kword ...
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... Block address tables Table 24. Bottom boot block addresses, M28W640HCB (continued 52/72 Size (Kword ...
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... M28W640HCT, M28W640HCB Appendix B Common Flash interface (CFI) The Common Flash interface is a JEDEC approved, standardized data structure that can be read from the Flash memory device. It allows a system software to query the device to determine various electrical and timing parameters, density information and functions supported by the memory ...
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... Address for primary algorithm extended query table (see Alternate vendor command set and control interface ID code second vendor - specified algorithm supported (0000h means none exists) Address for Alternate algorithm extended query table (0000h means none exists) M28W640HCT, M28W640HCB Value ST Top Bottom ‘Q’ ...
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... M28W640HCT, M28W640HCB Table 27. CFI query system interface information Offset Data 1Bh 0027h 1Ch 0036h 1Dh 00B4h 1Eh 00C6h 1Fh 0004h 20h 0004h 21h 000Ah 22h 0000h 23h 0005h 24h 0005h 25h 0003h 26h 0000h Description V logic supply minimum program/erase or write voltage ...
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... Block size in region 2 = 0020h * 256 byte Region 1 information Number of identical-size erase block = 0007h+1 Region 1 information Block size in region 1 = 0020h * 256 byte Region 2 information Number of identical-size erase block = 007Eh=1 Region 2 information Block size in region 2 = 0100h * 256 byte M28W640HCT, M28W640HCB Value 8 Mbyte x 16 Async 127 ...
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... M28W640HCT, M28W640HCB Table 29. Primary algorithm-specific extended query table Offset ( 35h (P+0)h = 35h 0050h (P+1)h = 36h 0052h (P+2)h = 37h 0049h (P+3)h = 38h 0031h Major version number, ASCII (P+4)h = 39h 0030h Minor version number, ASCII (P+5)h = 3Ah 0066h Extended query table contents for primary algorithm. address (P+6)h = 3Bh 0000h ...
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... JEDEC-plane physical high address bit "n" such that 2 bit "n" such that 2 Reserved Protection Register Lock 64 bits: unique device number 128 bits: user programmable OTP M28W640HCT, M28W640HCB Description n = factory pre-programmed bytes n = user programmable bytes Description ...
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... M28W640HCT, M28W640HCB Appendix C Flowcharts and pseudocodes Figure 15. Program flowchart and pseudocode Start Write 40h or 10h Write Address & Data Read Status Register YES YES YES NO Program to Protected YES End 1. Status check of b1 (protected block after a sequence. ...
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... V PP Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ; if (status_register.b4==1) /*program error */ Program error_handler ( ) ; Error ( (status_register.b1==1) /*program to protect block error */ error_handler ( ) ; } invalid) and b4 (program error) can be made after each program operation or PP M28W640HCT, M28W640HCB addressToProgram2, dataToProgram2) /*see note (3) */ /*see note (3) */ AI03539b ...
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... M28W640HCT, M28W640HCB Figure 17. Quadruple Word Program flowchart and pseudocode Start Write 56h Write Address 1 & Data 1 (3) Write Address 2 & Data 2 (3) Write Address 3 & Data 3 (3) Write Address 4 & Data 4 (3) Read Status Register YES YES YES ...
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... NO NO Program Complete if (status_register.b2==0) /*program completed */ else Write FFh } Read Data M28W640HCT, M28W640HCB writeToFlash (any_address, 0xB0) ; writeToFlash (any_address, 0x70 read status register to check if program has already completed */ status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; /*read data from another block*/ /*The device returns to Read Array (as if program/erase suspend was not issued) ...
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... M28W640HCT, M28W640HCB Figure 19. Erase flowchart and pseudocode Start Write 20h Write Block Address & D0h Read Status Register YES YES YES b4 YES YES End error is found, the Status Register must be cleared before further program/erase operations. ...
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... Erase Continues 64/72 erase_suspend_command ( ) { (status_register.b6==0) /*erase completed */ Erase Complete else Write FFh } Read Data M28W640HCT, M28W640HCB writeToFlash (any_address, 0xB0) ; writeToFlash (any_address, 0x70 read status register to check if erase has already completed */ do { status_register=readFlash (any_address must be toggled*/ } while (status_register.b7 writeToFlash (any_address, 0xFF) ; read_data ( ) ; ...
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... M28W640HCT, M28W640HCB Figure 21. Locking operations flowchart and pseudocode Start Write 60h Write 01h, D0h or 2Fh Write 90h Read Block Lock States Locking change confirmed? YES Write FFh End locking_operation_command (address, lock_operation) { writeToFlash (any_address, 0x60) ; /*configuration setup*/ if (lock_operation==LOCK) /*to protect the block*/ writeToFlash (address, 0x01) ...
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... V PP Invalid if (status_register.b3==1) /*VPP invalid error */ Error (1, 2) error_handler ( ) ; Program if (status_register.b4==1) /*program error */ Error (1, 2) error_handler ( ) ; if (status_register.b1==1) /*program to protect block error */ Block Error (1, 2) error_handler ( ) ; } invalid) and b4 (program error) can be made after each program operation or PP M28W640HCT, M28W640HCB AI04381 ...
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... M28W640HCT, M28W640HCB Appendix D Command interface and Program/Erase controller state . Table 31. Write state machine current/next SR Current Data when Read bit state Read Array 7 (FFh) Read Read Array ‘1’ Array Array Read Read ‘1’ Status Status Array Read Electronic Read ‘1’ ...
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... Sus Sus Read Setup (continue) Array Erase Program Erase Sus Sus Read Setup (continue) Array Program Erase Setup Setup M28W640HCT, M28W640HCB Prog/Ers Prog/Ers Read Suspend Resume Status (B0h) (D0h) (70h) Prog. Prog. Sus Program Sus Read (continue) Read Array Sts Read ...
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... M28W640HCT, M28W640HCB . Table 32. Write state machine current/next Current Read Read CFI state Elect.Sg. (90h) Read Read CFI Read Array Elect.Sg. Read Read CFI Read Status Elect.Sg. Read Read Read CFI Elect.Sg. Elect.Sg. Read CFI Read Read CFI Query Elect.Sg. Lock Setup ...
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... Erase Suspend Read Array Query Erase Lock Setup Erase Suspend Read Array Query Erase Lock Setup Erase Suspend Read Array Query Prot. Prog. Lock Setup Query Setup M28W640HCT, M28W640HCB Unlock Lock Lock Down Confirm Confirm Confirm (01h) (2Fh) (D0h) Erase (continue) Read Array Erase ...
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... M28W640HCT, M28W640HCB 11 Revision history Table 33. Document revision history Date Version 29-Jan-2008 1 Initial release. Revision history Changes 71/72 ...
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... Australia - Belgium - Brazil - Canada - China - Czech Republic - Finland - France - Germany - Hong Kong - India - Israel - Italy - Japan - Malaysia - Malta - Morocco - Singapore - Spain - Sweden - Switzerland - United Kingdom - United States of America 72/72 Please Read Carefully: © 2008 STMicroelectronics - All rights reserved STMicroelectronics group of companies www.st.com M28W640HCT, M28W640HCB ...