m28w320fcb STMicroelectronics, m28w320fcb Datasheet - Page 51

• Manufacturer Part Number: m28w320fcb
• Description: 32 Mbit 2mb X16, Boot Block 3v Supply Flash Memory
• Manufacturer: STMicroelectronics

M28W320FCT, M28W320FCB
Appendix B
Table 26.
1. Query data are always presented on the lowest order data outputs.
Table 27.
02h-0Fh reserved Reserved
Offset
Offset
1Bh
00h
10h
27h
00h
01h
10h
11h
12h
13h
14h
15h
16h
P
A
Reserved
CFI Query Identification String
System Interface Information
Device Geometry Definition
Primary Algorithm-specific Extended Query table
Alternate Algorithm-specific Extended Query table
88BAh
88BBh
0020h
0051h
0052h
0059h
0003h
0000h
0035h
0000h
Data
The Common Flash Interface is a JEDEC approved, standardized data structure that can be
read from the Flash memory device. It allows a system software to query the device to
determine various electrical and timing parameters, density information and functions
supported by the memory. The system can interface easily with the device, enabling the
software to upgrade itself when necessary.
When the CFI Query Command (RCFI) is issued the device enters CFI Query mode and the
data structure is read from the memory.
Table 31
The CFI data structure also contains a security area where a 64 bit unique security number
is written (see
mode by the final user. It is impossible to change the security number after it has been
written by ST. Issue a Read command to return to Read mode.
Query Structure Overview
CFI Query Identification String
Manufacturer Code
Device Code
Query Unique ASCII String "QRY"
Primary Algorithm Command Set and Control Interface ID code 16 bit
ID code defining a specific algorithm
Address for Primary Algorithm extended Query table (see
show the addresses used to retrieve the data.
Sub-section Name
Common Flash Interface (CFI)
Table 31: Security Code
(1)
(1)
Description
Area). This area can be accessed only in Read
Table
26,
Reserved for algorithm-specific information
Command set ID and algorithm data offset
Device timing & voltage information
Flash device layout
Additional information specific to the Primary
Algorithm (optional)
Additional information specific to the Alternate
Algorithm (optional)
Table
27,
Table
Table
Common Flash Interface (CFI)
Description
29)
28,
Table
Intel compatible
29,
P = 35h
Bottom
Table 30
Value
Top
"Q"
"R"
ST
"Y"
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and